CY7C016 Key Features
- True dual-ported memory cells which allow simultaneous reads of the same memory location
- 16K x 8 organization (CY7C006)
- 16K x 9 organization (CY7C016)
- 0.65-micron CMOS for optimum speed/power
- High-speed access: 15 ns
- Low operating power: ICC = 140 mA (typ.)
- Fully asynchronous operation
- Automatic power-down
- TTL patible
- Expandable data bus to 16/18 bits or more using Master/Slave chip select when using more than one device