CY7C1012AV33 Overview
The CY7C1012AV33 is a high-performance CMOS static RAM organized as 512K words by 24 bits. Each data byte is separately controlled by the individual chip selects (CE0, CE1, CE2). CE0 controls the data on the I/O0 I/O7, while CE1 controls the data on I/O8 I/O15, and CE2 controls the data on the data pins I/O16 I/O23.
CY7C1012AV33 Key Features
- High speed
- tAA = 8, 10, 12 ns
- Low active power
- 1080 mW (max.)
- Operating voltages of 3.3 ± 0.3V
- 2.0V data retention
- Automatic power-down when deselected
- TTL-patible inputs and outputs
- 3901 North First Street
- San Jose, CA 95134