CY7C1386B Overview
capability allows written data available at the output for the immediately next Read cycle. This device also incorporates The Cypress Synchronous Burst SRAM family employs pipelined enable circuit for easy depth expansion.
CY7C1386B Key Features
- 3901 North First Street
- San Jose
- CA 95134
- 408-943-2600 Revised December 3, 2001
- Individual byte write allows individual byte to be written. BWa
- controls DQa and DQPa. BWb controls DQb and DQPb. BWc controls DQc and DQPd. BWd controls DQd-DQd and DQPd
- BWa, BWb, BWc, and BWd can be active only with BWE LOW. GW LOW causes all bytes to be written. Write pass-through Functi
