CY7C1412AV18
Key Features
- Separate Independent Read and Write data ports — Supports concurrent transactions
- 250-MHz clock for high bandwidth
- 2-Word Burst on all accesses
- Double Data Rate (DDR) interfaces on both Read and Write .. ports (data transferred at 500 MHz) @ 250 MHz
- Two input clocks (K and K) for precise DDR timing — SRAM uses rising edges only
