Datasheet Details
| Part number | CY7C1429JV18 |
|---|---|
| Manufacturer | Cypress (now Infineon) |
| File Size | 705.88 KB |
| Description | 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
| Download | CY7C1429JV18 Download (PDF) |
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Overview: CY7C1422JV18, CY7C1429JV18 CY7C1423JV18, CY7C1424JV18 36-Mbit DDR-II SIO SRAM 2-Word Burst.
Download the CY7C1429JV18 datasheet PDF. This datasheet also includes the CY7C1422JV18 variant, as both parts are published together in a single manufacturer document.
| Part number | CY7C1429JV18 |
|---|---|
| Manufacturer | Cypress (now Infineon) |
| File Size | 705.88 KB |
| Description | 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
| Download | CY7C1429JV18 Download (PDF) |
|
|
|
The CY7C1422JV18, CY7C1429JV18, CY7C1423JV18, and CY7C1424JV18 are 1.8V Synchronous Pipelined SRAMs, equipped with Double Data Rate Separate I/O (DDR-II SIO) architecture.
The DDR-II SIO consists of two separate ports: the read port and the write port to access the memory array.
The read port has data outputs to support read operations and the write port has data inputs to support write operations.
| Part Number | Description |
|---|---|
| CY7C1429AV18 | 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
| CY7C1429BV18 | 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
| CY7C142 | 2K x 8 Dual-Port Static RAM |
| CY7C1420AV18 | (CY7C14xxAV18) 36-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1420BV18 | 36-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1420JV18 | 36-Mbit DDR-II SRAM 2-Word Burst Architecture |
| CY7C1420KV18 | 36-Mbit DDR II SRAM Two-Word Burst Architecture |
| CY7C1421AV18 | 1.8V Synchronous Pipelined SRAM |
| CY7C1422AV18 | 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |
| CY7C1422BV18 | 36-Mbit DDR-II SIO SRAM 2-Word Burst Architecture |