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Cypress Semiconductor Electronic Components Datasheet

CY8C20336A Datasheet

CapSense Applications

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CY8C20XX6A/S
1.8 V Programmable CapSense® Controller
with SmartSense™ Auto-tuning
1–33 Buttons, 0–6 Sliders
1.8 V Programmable CapSense® Controller with SmartSense™ Auto-tuning 1–33 Buttons, 0–6 Sliders
Features
Low power CapSense® block with SmartSense Auto-tuning
Patented CSA_EMC, CSD sensing algorithms
SmartSense_EMC Auto-Tuning
• Sets and maintains optimal sensor performance during run
time
• Eliminates system tuning during development and
production
• Compensates for variations in manufacturing process Low
average power consumption – 28 µA/sensor in run time
(wake-up and scan once every 125 ms)
Powerful Harvard-architecture processor
M8C CPU with a max speed of 24 MHz
Operating Range: 1.71 V to 5.5 V
Standby Mode 1.1 μA (Typ)
Deep Sleep 0.1 μA (Typ)
Operating Temperature range: –40 °C to +85 °C
Flexible on-chip memory
8 KB flash, 1 KB SRAM
16 KB flash, 2 KB SRAM
32 KB flash, 2 KB SRAM
Read while Write with EEPROM emulation
50,000 flash erase/write cycles
In-system programming simplifies manufacturing process
Four Clock Sources
Internal main oscillator (IMO): 6/12/24 MHz
Internal low-speed oscillator (ILO) at 32 kHz for watchdog
and sleep timers
External 32 KHz Crystal Oscillator
External Clock Input
Programmable pin configurations
Up to 36 general-purpose I/Os (GPIOs) configurable as
buttons or sliders
Dual mode GPIO (Analog inputs and Digital I/O supported)
High sink current of 25 mA per GPIO
• Max sink current 120 mA for all GPIOs
Source Current
• 5 mA on ports 0 and 1
• 1 mA on ports 2,3 and 4
Configurable internal pull-up, high-Z and open drain modes
Selectable, regulated digital I/O on port 1
Configurable input threshold on port 1
Versatile Analog functions
Internal analog bus supports connection of multiple sensors
to form ganged proximity sensor
Internal Low-Dropout voltage regulator for high power supply
rejection ratio (PSRR)
Full-Speed USB
12 Mbps USB 2.0 compliant
Additional system resources
I2C Slave:
• Selectable to 50 kHz, 100 kHz, or 400 kHz
Configurable up to 12 MHz SPI master and slave
Three 16-bit timers
Watchdog and sleep timers
Integrated supervisory circuit
10-bit incremental analog-to-digital converter (ADC) with
internal voltage reference
Two general-purpose high speed, low power analog
comparators
Complete development tools
Free development tool (PSoC Designer™)
Sensor and Package options
10 Sensors – QFN 16, 24
16 Sensors – QFN 24
22 / 25 Sensors – QFN 32
24 Sensors - WLCSP 30
31 Sensors – SSOP 48
33 Sensors – QFN 48
Errata: For information on silicon errata, see “Errata” on page 46. Details include trigger conditions, devices affected, and proposed workaround.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-54459 Rev. *Y
• San Jose, CA 95134-1709 • 408-943-2600
Revised May 18, 2017


Cypress Semiconductor Electronic Components Datasheet

CY8C20336A Datasheet

CapSense Applications

No Preview Available !

CY8C20XX6A/S
Logic Block Diagram
PSoC CORE
Port 4 Port 3
Port 2
Port 1
Port 0
1.8/2.5/3V PWRSYS[1]
LDO
(Regulator)
SYSTEM BUS
Global Analog Interconnect
1K/2K
SRAM
Interrupt
Controller
Supervisory ROM (SROM)
8K/16K/32K Flash
Nonvolatile Memory
CPU Core (M8C)
Sleep and
Watchdog
6/12/24 MHz Internal Main Oscillator
(IMO)
Internal Low Speed Oscillator (ILO)
Multiple Clock Sources
CAPSENSE
SYSTEM
Two
Comparators
SYSTEM BUS
CapSense
Module
Analog
Reference
Analog
Mux
USB
I2C
Slave
Internal
Voltage
References
System
Resets
POR
and
LVD
SPI
Master/
Slave
SYSTEM RESOURCES
Three 16-Bit
Programmable
Timers
Digital
Clocks
Note
1. Internal voltage regulator for internal circuitry
Document Number: 001-54459 Rev. *Y
Page 2 of 53


Part Number CY8C20336A
Description CapSense Applications
Maker Cypress Semiconductor
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CY8C20336A Datasheet PDF






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