CY9A110
Key Features
- Processor version: r2p1
- Up to 40 MHz Frequency Operation
- Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels
- 24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories [Flash memory]
- Up to 512 Kbyte
- Read cycle: 0 wait-cycle
- Security function for code protection [SRAM] This Series contain a total of up to 32 Kbyte on-chip SRAM. On-chip SRAM is composed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus and Dcode bus of Cortex-M3 core. SRAM1 is connected to System bus.
- SRAM0: Up to 16 Kbytes
- SRAM1: Up to 16 Kbytes Multi-function Serial Interface (Max 8 channels)
- 4 channels with 16 steps×9bit FIFO (ch.4-ch.7), 4 channels without FIFO (ch.0-ch3)
