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CYF0072V Datasheet - Cypress Semiconductor

18/36/72 Mbit Programmable FIFOs Master reset to clear entire FIFO

CYF0072V General Description

The Cypress programmable FIFO family offers the industry’s highest-density programmable FIFO memory device. It has independent read and write ports, which can be clocked up to 133 MHz. User can configure input and output bus sizes. The maximum bus size of 36 bits enables a maximum data throughput of.

CYF0072V Datasheet (606.22 KB)

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Datasheet Details

Part number:

CYF0072V

Manufacturer:

Cypress Semiconductor

File Size:

606.22 KB

Description:

18/36/72 mbit programmable fifos master reset to clear entire fifo.

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CYF0072V Mbit Programmable FIFOs Master reset clear entire FIFO Cypress Semiconductor

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