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Cypress Semiconductor Electronic Components Datasheet

FM25V01 Datasheet

128Kb Serial 3V F-RAM Memory

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FM25V01
128Kb Serial 3V F-RAM Memory
Features
128K bit Ferroelectric Nonvolatile RAM
Organized as 16,384 x 8 bits
High Endurance 100 Trillion (1014) Read/Writes
10 Year Data Retention
NoDelay™ Writes
Advanced High-Reliability Ferroelectric Process
Very Fast Serial Peripheral Interface - SPI
Up to 40 MHz Frequency
Direct Hardware Replacement for Serial Flash
SPI Mode 0 & 3 (CPOL, CPHA=0,0 & 1,1)
Write Protection Scheme
Hardware Protection
Software Protection
Description
The FM25V01 is a 128-kilobit nonvolatile memory
employing an advanced ferroelectric process. A
ferroelectric random access memory or F-RAM is
nonvolatile and performs reads and writes like a
RAM. It provides reliable data retention for 10 years
while eliminating the complexities, overhead, and
system level reliability problems caused by Serial
Flash and other nonvolatile memories.
Unlike Serial Flash, the FM25V01 performs write
operations at bus speed. No write delays are incurred.
Data is written to the memory array immediately
after it has been transferred to the device. The next
bus cycle may commence without the need for data
polling. The product offers very high write
endurance, orders of magnitude more endurance than
Serial Flash. Also, F-RAM exhibits lower power
consumption than Serial Flash.
These capabilities make the FM25V01 ideal for
nonvolatile memory applications requiring frequent
or rapid writes or low power operation. Examples
range from data collection, where the number of
write cycles may be critical, to demanding industrial
controls where the long write time of Serial Flash can
cause data loss.
The FM25V01 provides substantial benefits to users
of Serial Flash as a hardware drop-in replacement.
The device uses the high-speed SPI bus, which
Device ID
Device ID reads out Manufacturer ID & Part ID
Low Voltage, Low Power
Low Voltage Operation 2.0V 3.6V
Active Current 120 A (typ. @ 1MHz)
Standby Current 90 A (typ.)
Sleep Mode Current 5 A (typ.)
Industry Standard Configurations
Industrial Temperature -40 C to +85 C
8-pin “Green”/RoHS SOIC Package
enhances the high-speed write capability of F-RAM
technology. The device incorporates a read-only
Device ID that allows the host to determine the
manufacturer, product density, and product revision.
The device is guaranteed over an industrial
temperature range of -40°C to +85°C.
Pin Configuration
S
Q
W
VSS
1
2
3
4
8 VDD
7 HOLD
6C
5D
Pin Name
/S
/W
/HOLD
C
D
Q
VDD
VSS
Function
Chip Select
Write Protect
Hold
Serial Clock
Serial Data Input
Serial Data Output
Supply Voltage
Ground
This product conforms to specifications per the terms of the Ramtron standard warranty. The product has completed Ramtron’s
internal qualification testing and has reached production status.
Cypress Semiconductor Corporation 198 Champion Court • San Jose, CA 95134-1709 408-943-2600
Document Number: 001-84492 Rev. *B
Revised May 29, 2013


Cypress Semiconductor Electronic Components Datasheet

FM25V01 Datasheet

128Kb Serial 3V F-RAM Memory

No Preview Available !

W
S
HOLD
C
Instruction Decode
Clock Generator
Control Logic
Write Protect
Instruction Register
FM25V01 - 128Kb SPI FRAM
2K x 64
FRAM Array
Address Register
Counter
14
8
D
Data I/O Register
Q
3
Nonvolatile Status
Register
Pin Descriptions
Pin Name
/S
I/O
Input
C Input
/HOLD
Input
/W Input
D Input
Q Output
VDD
VSS
Supply
Supply
Figure 1. Block Diagram
Description
Chip Select: This active-low input activates the device. When high, the device enters
low-power standby mode, ignores other inputs, and all outputs are tri-stated. When
low, the device internally activates the C signal. A falling edge on /S must occur prior
to every op-code.
Serial Clock: All I/O activity is synchronized to the serial clock. Inputs are latched on
the rising edge and outputs occur on the falling edge. Since the device is static, the
clock frequency may be any value between 0 and 40 MHz and may be interrupted at
any time.
Hold: The /HOLD pin is used when the host CPU must interrupt a memory operation
for another task. When /HOLD is low, the current operation is suspended. The device
ignores any transition on C or /S. All transitions on /HOLD must occur while C is low.
This pin has a weak internal pull-up (see RIN spec, pg 11). However, if it is not used,
the /HOLD pin should be tied to VDD.
Write Protect: This active-low pin prevents write operations to the Status Register
only. A complete explanation of write protection is provided on pages 6 and 7. If not
used, the /W pin should be tied to VDD.
Serial Input: All data is input to the device on this pin. The pin is sampled on the
rising edge of C and is ignored at other times. It should always be driven to a valid
logic level to meet IDD specifications.
* D may be connected to Q for a single pin data interface.
Serial Output: This is the data output pin. It is driven during a read and remains tri-
stated at all other times including when /HOLD is low. Data transitions are driven on
the falling edge of the serial clock.
* Q may be connected to D for a single pin data interface.
Power Supply
Ground
Document Number: 001-84492 Rev. *B
Page 2 of 18


Part Number FM25V01
Description 128Kb Serial 3V F-RAM Memory
Maker Cypress Semiconductor
Total Page 18 Pages
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