Description
The Cypress Synchronous Burst SRAM family employs high-speed, low power CMOS designs using advanced triple-layer polysilicon, double-layer metal technology..
Features
- Fast access times: 2.5 ns, 3.0 ns, and 3.5 ns.
- Fast clock speed: 225 MHz, 200 MHz, 166 MHz, and 150 MHz.
- Fast OE access times: 2.5 ns, 3.0 ns, and 3.5 ns.
- Optimal for performance (two cycle chip deselect, depth expansion without wait state).
- 3.3V.
- 5% and +10% power supply.
- 3.3V or 2.5V I/O supply.
- 5V tolerant inputs except I/Os.
- Clamp diodes to V SS at all inputs and outputs.
- Common data inputs and data out.
