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Cypress Semiconductor Electronic Components Datasheet

MB96F326 Datasheet

16-bit Microcontroller

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MB96320 Series
F2MC-16FX, 16-bit Microcontroller
MB96320 series is based on Cypress advanced 16FX architecture (16-bit with instruction pipeline for RISC-like performance). The
CPU uses the same instruction set as the established 16LX series - thus allowing for easy migration of 16LX Software to the new
16FX products. 16FX improvements compared to the previous generation include significantly improved performance - even at the
same operation frequency, reduced power consumption and faster start-up time.
For highest processing speed at optimized power consumption an internal PLL can be selected to supply the CPU with up to 56MHz
operation frequency from an external 4MHz resonator. The result is a minimum instruction cycle time of 17.8ns going together with
excellent EMI behavior. An on-chip clock modulation circuit significantly reduces emission peaks in the frequency spectrum. The
emitted power is minimized by the on-chip voltage regulator that reduces the internal CPU voltage. A flexible clock tree allows to select
suitable operation frequencies for peripheral resources independent of the CPU speed.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-04584 Rev. *A
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 25, 2016


Cypress Semiconductor Electronic Components Datasheet

MB96F326 Datasheet

16-bit Microcontroller

No Preview Available !

MB96320 Series
Features
Feature
Technology
CPU
System clock
On-chip voltage regulator
Low voltage reset
Code Security
Memory Patch Function
DMA
Interrupts
Timers
CAN
USART
I2C
Description
0.18m CMOS
F2MC-16FX CPU
Up to 56 MHz internal, 17.8 ns instruction cycle time
Optimized instruction set for controller applications (bit, byte, word and long-word data types; 23 different
addressing modes; barrel shift; variety of pointers)
8-byte instruction execution queue
Signed multiply (16-bit 16-bit) and divide (32-bit/16-bit) instructions available
On-chip PLL clock multiplier (x1 - x25, x1 when PLL stop)
3 MHz - 16 MHz external crystal oscillator clock (maximum frequency when using ceramic resonator
depends on Q-factor).
Up to 56 MHz external clock
32-100 kHz subsystem quartz clock
100kHz/2MHz internal RC clock for quick and safe startup, oscillator stop detection, watchdog
Clock source selectable from main- and subclock oscillator (part number suffix “W”) and on-chip RC
oscillator, independently for CPU and 2 clock domains of peripherals.
Low Power Consumption - 13 operating modes : (different Run, Sleep, Timer modes, Stop mode)
Clock modulator
Internal voltage regulator supports reduced internal MCU voltage, offering low EMI and low power
consumption figures
Reset is generated when supply voltage is below minimum.
Protects ROM content from unintended read-out
Replaces ROM content
Can also be used to implement embedded debug support
Automatic transfer function independent of CPU, can be assigned freely to resources
Fast Interrupt processing
8 programmable priority levels
Non-Maskable Interrupt (NMI)
Three independent clock timers (23-bit RC clock timer, 23-bit Main clock timer, 17-bit Sub clock timer)
Watchdog Timer
Supports CAN protocol version 2.0 part A and B
ISO16845 certified
Bit rates up to 1 Mbit/s
32 message objects
Each message object has its own identifier mask
Programmable FIFO mode (concatenation of message objects)
Maskable interrupt
Disabled Automatic Retransmission mode for Time Triggered CAN applications
Programmable loop-back mode for self-test operation
Full duplex USARTs (SCI/LIN)
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
Up to 400 kbps
Master and Slave functionality, 8-bit and 10-bit addressing
Document Number: 002-04584 Rev. *A
Page 2 of 93


Part Number MB96F326
Description 16-bit Microcontroller
Maker Cypress Semiconductor
Total Page 30 Pages
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