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Cypress Semiconductor Electronic Components Datasheet

S29JL064J Datasheet

Simultaneous Read/Write Flash

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S29JL064J
Distinctive Characteristics
64-Mbit (8M × 8-Bit/4M × 16-Bit), 3 V,
Simultaneous Read/Write Flash
Architectural Advantages
Simultaneous Read/Write operations
– Data can be continuously read from one bank while executing
erase/program functions in another bank
– Zero latency between read and write operations
Flexible bank architecture
– Read may occur in any of the three banks not being programmed
or erased
– Four banks may be grouped by customer to achieve desired bank
divisions
Boot sectors
– Top and bottom boot sectors in the same device
– Any combination of sectors can be erased
Manufactured on 0.11 µm Process Technology
Secured Silicon Region: Extra 256-byte sector
Factory locked and identifiable: 16 bytes available for secure,
random factory Electronic Serial Number; verifiable as factory
locked through autoselect function
Customer lockable: One-time programmable only. Once locked,
data cannot be changed
Zero power operation
– Sophisticated power management circuits reduce power
consumed during inactive periods to nearly zero
Compatible with JEDEC standards
– Pinout and software compatible with single-power-supply flash
standard
Package Options
48-ball Fine-pitch BGA
48-pin TSOP
Performance Characteristics
High performance
– Access time as fast as 55 ns
– Program time: 7 µs/word typical using accelerated programming
function
Ultra low power consumption (typical values)
– 2 mA active read current at 1 MHz
– 10 mA active read current at 5 MHz
– 200 nA in standby or automatic sleep mode
Cycling endurance: 1 million cycles per sector typical
Data retention: 20 years typical
Software Features
Supports Common Flash Memory Interface (CFI)
Erase suspend/erase resume
– Suspends erase operations to read data from, or program data to,
a sector that is not being erased, then resumes the erase
operation
Data# polling and toggle bits
– Provides a software method of detecting the status of program or
erase operations
Unlock bypass program command
– Reduces overall programming time when issuing multiple program
command sequences
Hardware Features
Ready/Busy# output (RY/BY#)
– Hardware method for detecting program or erase cycle
completion
Hardware reset pin (RESET#)
– Hardware method of resetting the internal state machine to the
read mode
WP#/ACC input pin
– Write protect (WP#) function protects sectors 0, 1, 140, and 141,
regardless of sector protect status
– Acceleration (ACC) function accelerates program timing
Sector Protection
– Hardware method to prevent any program or erase operation
within a sector
– Temporary Sector Unprotect allows changing data in protected
sectors in-system
General Description
The S29JL064J is a 64 Mbit, 3.0 volt-only flash memory device, organized as 4,194,304 words of 16 bits each or 8,388,608 bytes of
8 bits each. Word mode data appears on DQ15–DQ0; byte mode data appears on DQ7–DQ0. The device is designed to be
programmed in-system with the standard 3.0 volt VCC supply, and can also be programmed in standard EPROM programmers. The
device is available with an access time of 55, 60, 70 ns and is offered in a 48-ball FBGA or 48-pin TSOP package. Standard control
pins—chip enable (CE#), write enable (WE#), and output enable (OE#)—control normal read and write operations, and avoid bus
contention issues. The device requires only a single 3.0 volt power supply for both read and write functions. Internally generated
and regulated voltages are provided for the program and erase operations.
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-00856 Rev. *H
• San Jose, CA 95134-1709 • 408-943-2600
Revised August 23, 2018


Cypress Semiconductor Electronic Components Datasheet

S29JL064J Datasheet

Simultaneous Read/Write Flash

No Preview Available !

S29JL064J
Contents
Distinctive Characteristics .................................................. 1
General Description ............................................................. 1
1. Simultaneous Read/Write Operations
with Zero Latency ................................................................. 3
1.1 S29JL064J Features...................................................... 3
2. Product Selector Guide ............................................... 4
3. Block Diagram.............................................................. 4
4. Connection Diagrams.................................................. 5
4.1 48-pin TSOP Package ................................................... 5
4.2 48-ball FBGA Package .................................................. 6
5. Pin Description............................................................. 6
6. Logic Symbol ............................................................... 7
7. Ordering Information ................................................... 8
8. Device Bus Operations.............................................. 10
8.1 Word/Byte Configuration.............................................. 10
8.2 Requirements for Reading Array Data......................... 11
8.3 Writing Commands/Command Sequences.................. 11
8.4 Simultaneous Read/Write Operations
with Zero Latency......................................................... 11
8.5 Standby Mode.............................................................. 12
8.6 Automatic Sleep Mode................................................. 12
8.7 RESET#: Hardware Reset Pin..................................... 12
8.8 Output Disable Mode ................................................... 13
8.9 Autoselect Mode .......................................................... 17
8.10 Boot Sector/Sector Block
Protection and Unprotection ........................................ 18
8.11 Write Protect (WP#) ..................................................... 19
8.12 Temporary Sector Unprotect........................................ 20
8.13 Secured Silicon Region................................................ 22
8.14 Hardware Data Protection............................................ 23
9. Common Flash Memory Interface (CFI) ................... 24
10. Command Definitions................................................ 27
10.1 Reading Array Data ..................................................... 27
10.2 Reset Command .......................................................... 27
10.3 Autoselect Command Sequence ................................. 28
10.4 Enter Secured Silicon Region/
Exit Secured Silicon Region Command Sequence...... 28
10.5 Byte/Word Program Command Sequence................... 28
10.6 Chip Erase Command Sequence ................................ 30
10.7 Sector Erase Command Sequence ............................. 30
10.8 Erase Suspend/Erase Resume Commands ................ 31
11. Write Operation Status .............................................. 33
11.1 DQ7: Data# Polling ...................................................... 33
11.2 RY/BY#: Ready/Busy#................................................. 34
11.3 DQ6: Toggle Bit I ......................................................... 35
11.4 DQ2: Toggle Bit II ........................................................ 36
11.5 Reading Toggle Bits DQ6/DQ2.................................... 37
11.6 DQ5: Exceeded Timing Limits ..................................... 37
11.7 DQ3: Sector Erase Timer............................................. 37
12. Absolute Maximum Ratings....................................... 38
13. Operating Ranges ....................................................... 39
14. DC Characteristics...................................................... 39
14.1 CMOS Compatible ........................................................ 39
14.2 Zero-Power Flash ......................................................... 40
15. Test Conditions ........................................................... 41
16. Key To Switching Waveforms .................................... 42
17. AC Characteristics...................................................... 43
17.1 Read-Only Operations .................................................. 43
17.2 Hardware Reset (RESET#)........................................... 44
17.3 Word/Byte Configuration (BYTE#) ................................ 45
17.4 Erase and Program Operations .................................... 46
17.5 Temporary Sector Unprotect......................................... 50
17.6 Alternate CE# Controlled Erase
and Program Operations............................................... 51
18. Erase and Programming Performance ..................... 53
19. Pin Capacitance .......................................................... 53
20. Physical Dimensions .................................................. 54
20.1 TS 048—48-Pin Standard TSOP .................................. 54
20.2 VBK048—48-Pin FBGA ................................................ 55
21. Revision History.......................................................... 56
Document Number: 002-00856 Rev. *H
Page 2 of 59


Part Number S29JL064J
Description Simultaneous Read/Write Flash
Maker Cypress Semiconductor
Total Page 30 Pages
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