SC680E buffer equivalent, smbus system clock buffer.
§ § § § § § § 18 output buffer for high clock fanout applications Each output can be internally disabled for EMI reduction VDD=3.3 volts for chip Vdd Output frequency ran.
Each output can be internally disabled for EMI reduction VDD=3.3 volts for chip Vdd Output frequency range 10 Mhz to 100.
Image gallery
Download