Simplified Block Diagram
3.3V or 5.0V
XTAL
Input
X1
X2
W530-02
Spread Spectrum
Output
(EMI suppressed)
Oscillator or
Reference Input
3.3V or 5.0V
X1
W530-02
Spread Spectrum
Output
(EMI suppressed)
W530-02
Pin Configuration[1]
X1
X2
AVDD
MW0^
STOP^
OR1^
NC
GND
OR2*
SSON#
SSOP
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
REFOUT
VDD
GND
IR1*
IR2*
SSOUT
MW1*
GND
VDD
MW2^
Pin Definitions
Pin Name Pin No. Pin Type
Pin Description
SSOUT
15 O Output Modulated Frequency. Frequency modulated signal. Frequency of the output is
selected as shown in Table 1.
REFOUT
20
O Non-modulated Output. This pin provides a copy of the reference frequency. This output
will not have the Spread Spectrum feature regardless of the state of logic input SSON#.
CLKIN or X1 1
I Crystal Connection or External Reference Frequency Input. This pin has dual functions.
It may either be connected to an external crystal, or to an external reference clock.
NC or X2
2
I Crystal Connection: Input connection for an external crystal. If using an external reference
signal, this pin must be left unconnected.
SSON# 10 I Spread Spectrum Control (Active LOW). Asserting this signal (active LOW) turns the
internal modulation waveform on. This pin has an internal pull-down resistor.
MW0:2
4, 14, 11 I Modulation Width Selection. When the Spread Spectrum feature is turned on, these pins
are used to select the amount of variation and peak EMI reduction that is desired on the
output signal (see Table 2). MW0: DOWN, MW1: UP, MW2: DOWN.
IR1:2
17,16
I Reference Frequency Selector. The logic level provided at this input indicates to the internal
logic what range the reference frequency is in and determines the factor by which the device
multiplies the input frequency. Refer to Table 3. These pins have internal pull-up resistors.
NC 7 NC No Connection. Leave this pin unconnected.
STOP
5 I Output Disable. When pulled HIGH, stops all outputs at logic low voltage level. This pin has
an internal pull-down.
OR1:2
6,9 I Output Frequency Selection Bits. These pins select the frequency of operation for the
output. Refer to Table 1. OR1: DOWN, OR2: UP.
VDD
3, 12, 19 P Power Connection. Connected to 3.3V or 5V power supply.
GND
8, 13, 18 G Ground Connection. Connect all ground pins to the common ground plane.
Overview
The W530-02 product is one of a series of devices in the In a system, not only is EMI reduced in the various clock lines,
Cypress PREMIS family. The PREMIS family incorporates the but also in all signals which are synchronized to the clock.
latest advances in phase-locked loop (PLL) spread spectrum Therefore, the benefits of using this technology increase with
frequency synthesizer techniques. By frequency modulating the number of address and data lines in the system. The
the output with a low frequency carrier, peak EMI is greatly Simplified Block Diagram on page 1 shows a simple imple-
reduced. Use of this technology allows systems to pass mentation.
increasingly difficult EMI testing without resorting to costly
shielding or redesign.
Note:
1. Pins that are marked with [*] have internal pull-up resistors. Pins that are marked with [^] have internal pull-down resistors.
Document #: 38-07190 Rev. *A
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