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DM9162 Datasheet Preview

DM9162 Datasheet

Industrial-Temperature 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

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DM9162/DM9162I
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
DAVICOM Semiconductor, Inc.
DM9162/DM9162I
Industrial-Temperature 10/100 Mbps Fast Ethernet
Physical Layer Single Chip Transceiver
DATA SHEET
Preliminary
Version: DM9162-DS-P03
September 19, 2016
1 Preliminary
Version: DM9162-DS-12-P03
September 19, 2016




DAVICOM

DM9162 Datasheet Preview

DM9162 Datasheet

Industrial-Temperature 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

No Preview Available !

DM9162/DM9162I
10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
Content
1. GENERAL DESCRIPTION.................................................................................................................................................................. 4
2. FEATURES ............................................................................................................................................................................................ 4
3. BLOCK DIAGRAM ............................................................................................................................................................................... 5
4. PIN CONFIGURATION: ....................................................................................................................................................................... 6
4.1 48-PIN LQFP...................................................................................................................................................................................... 6
4.2 32-PIN QFN........................................................................................................................................................................................ 7
5. PIN DESCRIPTION............................................................................................................................................................................... 8
5.1 NORMAL MII INTERFACE..................................................................................................................................................................... 8
5.2 MEDIA INTERFACE ............................................................................................................................................................................10
5.3 LED INTERFACE...............................................................................................................................................................................10
5.4 MODE................................................................................................................................................................................................10
5.5 BIAS AND CLOCK ..............................................................................................................................................................................11
5.6 POWER.............................................................................................................................................................................................11
5.7 TABLE A (MEDIA TYPE SELECTION)..................................................................................................................................................12
5.8 PIN MAPS OF NORMAL MII, REDUCED MII, AND 10BASE-T GPSI (7-WIRED) MODE.....................................................................12
6. LED CONFIGURATION.....................................................................................................................................................................13
6.1 LED FUNCTION DESCRIPTION .........................................................................................................................................................14
7. FUNCTIONAL DESCRIPTION .........................................................................................................................................................15
7.1 MII INTERFACE..................................................................................................................................................................................15
7.2 100BASE-TX OPERATION................................................................................................................................................................17
8. MII REGISTER DESCRIPTION.........................................................................................................................................................24
8.1 BASIC MODE CONTROL REGISTER (BMCR) - 00............................................................................................................................25
8.2 BASIC MODE STATUS REGISTER (BMSR) - 01...............................................................................................................................26
8.3 PHY ID IDENTIFIER REGISTER #1 (PHYID1) - 02...........................................................................................................................27
8.4 PHY ID IDENTIFIER REGISTER #2 (PHYID2) - 03...........................................................................................................................27
8.5 AUTO-NEGOTIATION ADVERTISEMENT REGISTER (ANAR) - 04......................................................................................................28
8.6 AUTO-NEGOTIATION LINK PARTNER ABILITY REGISTER (ANLPAR) 05.......................................................................................29
8.7 AUTO-NEGOTIATION EXPANSION REGISTER (ANER) - 06 ..............................................................................................................30
8.8 DAVICOM SPECIFIED CONFIGURATION REGISTER (DSCR) - 16..................................................................................................30
8.9 DAVICOM SPECIFIED CONFIGURATION AND STATUS REGISTER (DSCSR) - 17..........................................................................32
8.10 10BASE-T CONFIGURATION/STATUS (10BTCSR) - 18..............................................................................................................33
8.12 (SPECIFIED CONFIG) REGISTER 20 .............................................................................................................................................34
8.13 DAVICOM SPECIFIED INTERRUPT REGISTER 21......................................................................................................................35
8.14 DAVICOM SPECIFIED RECEIVE ERROR COUNTER REGISTER (RECR) 22.............................................................................35
8.15 DAVICOM SPECIFIED DISCONNECT COUNTER REGISTER (DISCR) 23..................................................................................36
8.16 DAVICOM HARDWARE RESET LATCH STATE REGISTER (RLSR) 24......................................................................................36
8.17 POWER SAVING CONTROL REGISTER (PSCR) 29 ....................................................................................................................36
9. DC AND AC ELECTRICAL CHARACTERISTICS .......................................................................................................................37
9.1 ABSOLUTE MAXIMUM RATINGS (25C)............................................................................................................................................37
9.2 OPERATING CONDITIONS .................................................................................................................................................................37
2 Preliminary
Version: DM9162-DS-12-P03
September 19, 2016


Part Number DM9162
Description Industrial-Temperature 10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver
Maker DAVICOM
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DM9162 Datasheet PDF






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