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DAVICOM

DM9621A Datasheet Preview

DM9621A Datasheet

USB2.0 to 10/100M Fast Ethernet Controller

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DM9621A
USB2.0 to Fast Ethernet Controller
DAVICOM Semiconductor, Inc.
DM9621A
USB2.0 to 10/100M Fast Ethernet Controller
DATA SHEET
Final
Doc No: DM9621A-13-MCO-DS-F01
June 30, 2015
Final
Version: DM9621A-13-MCO-DS-F01
June 30, 2015
1




DAVICOM

DM9621A Datasheet Preview

DM9621A Datasheet

USB2.0 to 10/100M Fast Ethernet Controller

No Preview Available !

DM9621A
USB2.0 to Fast Ethernet Controller
Content
1 Features ............................................................................................................................................. 5
1.1 General Description ............................................................................................................ 6
2 Block Diagram and Block Description.............................................................................................. 7
3 Pin Configuration .............................................................................................................................. 8
3.1 48-Pin QFN with RMII Interface........................................................................................... 8
3.2 48-Pin QFN with RMII Interface........................................................................................... 9
3.2.1 RMII Interface............................................................................................................ 9
3.2.2 EEPROM Interface..................................................................................................... 9
3.2.3 USB Interface ............................................................................................................ 9
3.2.4 Clock Interface......................................................................................................... 10
3.2.5 LED Interface .......................................................................................................... 10
3.2.5 10/100 PHY............................................................................................................. 10
3.2.6 Miscellaneous.......................................................................................................... 11
3.2.7 Power ..................................................................................................................... 11
3.3 Strap Pin Table ..................................................................................................................11
4 Vender Control an Status Register Set............................................................................................12
4.1 Network Control Register (00H) .........................................................................................14
4.2 Network Status Register (01H)...........................................................................................15
4.3 TX Control Register (02H)..................................................................................................16
4.4 RX Control Register (05H) .................................................................................................16
4.5 RX Status Register (06H)...................................................................................................17
4.6 Receive Overflow Counter Register (07H)..........................................................................17
4.7 Back Pressure Threshold Register (08H) ...........................................................................18
4.8 Flow Control Threshold Register (09H)...............................................................................18
4.9 RX/TX Flow Control Register (0AH) ...................................................................................19
4.10 EEPROM & PHY Control Register (0BH) ...........................................................................19
4.11 EEPROM & PHY Address Register (0CH)..........................................................................20
4.12 EEPROM & PHY Data Register (EE_PHY_L0DH EE_PHY_H0EH).........................20
4.13 Wake Up Control Register (0FH)........................................................................................20
4.14 Physical Address Register (10H~15H)................................................................................20
4.15 Multicast Address Register (16H~1DH) ..............................................................................21
4.16 General Purpose Control Register (1EH)............................................................................21
4.17 General Purpose Register (1FH)........................................................................................21
4.18 Vendor ID Register (28H~29H)...........................................................................................21
4.19 Product ID Register (2AH~2BH).........................................................................................21
4.20 Chip Revision Register (2CH) ............................................................................................21
4.21 TX Special Control Register (2DH).....................................................................................22
4.22 External PHY Force Mode Control Register (2EH)..............................................................22
4.23 Transmit Check Sum Control Register (31H)......................................................................22
4.24 Receive Check Sum Control Status Register (32H)............................................................23
4.25 External PHY Ceiver Address Register (33H) .....................................................................23
4.26 General Purpose Control Register 2 (34H) .........................................................................23
4.27 General Purpose Register 2 (35H) .....................................................................................23
4.28 EEPROM and PHY Control Register (3AH)........................................................................24
4.29 Pause Packet Control/Status Register (3DH) .....................................................................24
4.30 IEEE802.3az Enter Time Register (3EH)............................................................................24
4.31 IEEE802.3az Leave Time Register (3FH)...........................................................................24
4.32 Link Up/Down Wakeup Event Register (51H) .....................................................................24
4.33 IPv6 NA/ARP Register (52H)..............................................................................................25
4.34 Minimum RX SOF Control Register (58H) ..........................................................................25
4.35 Minimum RX Burst Counter Register (59H) ........................................................................25
4.36 Transmit Packet Counter (81H)..........................................................................................25
4.37 USB Packet Error Counter (82H)........................................................................................25
Final
Doc No: DM9621A-13-MCO-DS-F01
June 30, 2015
2


Part Number DM9621A
Description USB2.0 to 10/100M Fast Ethernet Controller
Maker DAVICOM
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