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DD-03296 Datasheet Preview

DD-03296 Datasheet

96-Channel Discrete to Digital Interface

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DD-03296
96-CHANNEL DISCRETE-TO-DIGITAL
INTERFACE
DESCRIPTION
APPLICATIONS
The DD-03296 device is a 96-channel
discrete-to-digital interface with uni-
versal HlRF-isolated inputs that
www.DataSheaect4cUep.cto2m8 V/Open, Open/Gnd and 28
V/Gnd signals.
The output is an addressable 8- or
16-bit tri-state port, selectable for
channel data, status, bounce, built-in
self-test (BIST) and major fault, and is
compatible with TTL logic.
The DD-03296 is specifically
designed to address built-in self-test
autonomy, fault isolation and toler-
ance.
Because of its high reliability and low
cost, these features enable the DD-
03296 to satisfy a variety of interface
requirements in aerospace applica-
tions, including flight critical, essen-
tial, and nonessential functions.
FEATURES
HIRF Layer
Universal Inputs
28 V/Gnd
Open/Gnd
28 V/Open
Built-in Self-Test
Soft Failure Reporting
Higher MTBUR
ARINC 429 Output Port
REFERENCE
INPUT
REFERENCE INPUT
DATA
BOUNCE
96
96
DISCRETE
INPUTS
PROCESSOR AND
TEST MATRIX
BIT
FAULT
96
96
96
SHIFT H/L TEST
MATRIX
ENABLE HI
5
TRANSFER DISCRETE ENABLE LO
5
33
ADDRESS DISCRETE DATA EN
DECODER ARINC DATA EN
SEL0
SEL1
SEL2
1 MHZ
RESET*
DUAL REDUNDANT
CLOCK AND
CONTROL LOGIC
ENABLE*
ADDRESS (A5..A0)
8/16 BUS
ARINC 429 DATA RATE
ARINC 429 MESSAGE RATE
DISCRETE
TRI-STATE
DRIVERS
16
DATA BUS
DATA (8/16 BITS)
DISCRETE
DATA
TRANSFER
VERIFIER
ARINC
DATA
TRANSFER
VERIFIER
TRANSFER FAULT
96 FAULT
96 BIT
TRANSFER FAULT
FAULT
PROCESSING
CIRCUITRY
DISCRETE
FAULT
ARINC
FAULT
FAULT*
ARINC 429
TRI-STATE
DRIVERS
16 DATA BUS
TRI-STATE ENABLES
READY
10µS CLOCK
80µS CLOCK
ARINC 429
XMITTER
(TTL)
2 ARINC 429
OUTPUT
NOTE: (*) Indicates active low.
© 1993, 1999 Data Device Corporation
U.S. Patent No. 5526288
FIGURE 1. DD-03296 BLOCK DIAGRAM
DATA READY




DDC

DD-03296 Datasheet Preview

DD-03296 Datasheet

96-Channel Discrete to Digital Interface

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TABLE 1. DD-03296 SPECIFICATIONS
PARAMETER
UNITS MlN TYP MAX
ABSOLUTE MAXIMUM RATINGS
Supply VoItages (VCC, VDD)
V -0.3 5.0 7.0
Reference Inputs
V -80
80
Discrete Inputs
V -80
80
Digital Inputs
OPERATING CONDITIONS
V -0.3
VDD+0.3
Supply Voltages (VDD)
V 4.5
5.5
DIGITAL
INPUTS/OUTPUTS
Logic Compatibiliy
TTL/
CMOS
Digital Inputs
sVIH
www.DataShseVeItL4U.com
V 2.0
V
0.8
sVIL (VIN = 0)
µA -40
-400
Clock Input (See Note 1)
MHz 0.99 1.00 1.01
Digital Outputs
sVOH (lOH = -1ma)
V VDD-0.5
sVOH (IOH = -4ma)
V 2.4
sVOL (lOH = 4ma) V 0.4
ANALOG INPUTS
See FIGURE 4
POWER SUPPLY REQUIREMENTS
(Total VDD, Analog & Digital)
IDD (VDD = +5V
[Digital Outputs Unloaded])
mA
25 45
POWER DISSIPATION
PD mw 125.0 250.0
THERMAL
Operating Temperature
sType 2
°C -40
85
Storage Temp
°C -65
150
Lead Temperature
(Localized, 1 sec. duration)
°C
280
(Body, 2 sec. duration)
°C
210
Junction Temperature
θjc
°C/W
5.0
θca
°C/W
20.0
MTBF per Mil-Hbk-217 for Airborne
Inhabited Cargo at 64°C
1,400,000 hrs. plastic
PHYSICAL CHARACTERISTICS
Size in 2.3 x 2.3
(cm)
(5.84 x 5.84)
Weight
oz 0.83
(gm)
23.5
Note 1: ARINC 429 bit rate is derived from the clock. Refer to ARINC 429 Bit Rate
to avoid interference. ARINC 429-14 (January 4, 1993), paragraph 2.4 “Timing
Related Elements” contains a “COMMENTARY” section following subparagraph
2.1.4.2 (“Low-Speed Operation”) that cautions against using “precisely“ 100 kilobits
per second.
WHAT IS A DISCRETE?
Advisory Circular (FAA), Airworthiness Approval of Traffic Alert
and Collision Avoidance Systems (TCAS II) and Mode S
Transponders, AC20-131, defines a discrete as “a separate,
complete and distinct signal. ” In many instances these signals
are binary, on or off, 28 V-based signals; they are typically
Open/Gnd, 28 V/Open, or 28 V/Gnd with very low bandwidth
(DC to 200 Hz).
Although the translation of these signals to TTL-levels that are
compatible with digital avionics may seem simple, RTCA DO-
160 power, lightning and high-intensity-radiated-fields (HIRF)
are complicating factors. Add to that the desire to have a stan-
dardized, addressable, reliable interface and the challenge
becomes apparent.
Today’s systems address the interface requirements with cir-
cuits tailored for each interface comprised of R-C input filters,
divider networks, diode isolation and comparators. Multichannel
interfacing to a processor requires additional logic and latches.
The resulting circuit generally lacks any built-in test capability,
consumes considerable pc-board real estate (up to one sq. in.
per channel) and offers no chip-level redundancy.
FUNCTIONAL INTEGRATION
Using the aggregated signal definition and functional require-
ments of industry, ILC Data Device Corporation has developed
a discrete interface with universal HIRF-isolated inputs to han-
dle 28V/Open, Open/Gnd and 28V/Gnd signals. Each channel
is routed through a HIRF filter and comparator. Its output is a
selectable 8- or 16-bit tri-state port, addressable for channel
data, status, bounce, built-in self-test and major fault informa-
tion.
This design specifically addresses built-in self-test autonomy,
fault isolation and tolerance; moreover, its functional integration
results in significant added reliability. A comparative look at
MTBF, calculated in accordance with MIL-HBK-217 for airborne
inhabited cargo environments at 64°C, indicates an order of
magnitude improvement (1,400,000 hours vs. 173,000 hours)
for a plastic packaged integrated approach vs. a similarly pack-
aged discrete-component implementation. In addition, the real
estate used is reduced from as much as 64 to 5 square inches.
Additional key DD-03296 features include:
BOUNCE: Relays and switches, as mechanical devices, have
a characteristic ‘bounce’ to their signal transition. It is desirable
to mask this bounce by delaying the output digital transition
accordingly. This sampling rate of the device can be varied to
allow for debounce of relay/switch inputs. In addition, the triple-
sampling of a given comparator enables a consistent reading of
otherwise asynchronous signals. Bounce is an addressable sta-
2


Part Number DD-03296
Description 96-Channel Discrete to Digital Interface
Maker DDC
Total Page 18 Pages
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