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DSC556-03 Datasheet Preview

DSC556-03 Datasheet

Two Output PCIe Gen1 Clock Generator

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DSC556-03
Crystal-lessTM Two Output PCIe Gen1 Clock Generator
General Description
The DSC556-03 is a crystal-less™, two
output, Gen.1 PCI express clock generator.
The device implements Discera’s proven
silicon MEMS technology to provide
100MHz* differential output clocks with
excellent jitter and stability over a wide
range of supply voltages and temperatures.
By eliminating the external quartz crystal,
the DSC556-03 significantly enhances
reliability and accelerates product
development, while meeting stringent clock
performance criteria for a variety of
Embedded, Industrial, storage, and
networking applications.
DSC556-03 has an Output Enable / Disable
feature allowing it to disable the outputs
when OE is low. The device is available in
two different packages; a “drop-in”
replacement 16 pin TSSOP or a space
saving 14 pin QFN (77% less board space).
Block Diagram
* Clk0+/- and Clk1+/- are 100 MHz as per PCIe
standards. For other frequencies, please
contact the factory.
Features
Two PCIe output clocks
o 100MHz
o HCSL output format
Wide Temperature Range
o Ext. Industrial: -40° to 105° C
o Industrial: -40° to 85° C
o Ext. commercial: -20° to 70° C
Supply Range of 2.25 to 3.6 V
Low Power Consumption
o 30% lower than competing devices
Excellent Shock & Vibration Immunity
o Qualified to MIL-STD-883
Available Footprints:
o 16 TSSOP
o 14 QFN
Lead Free & RoHS Compliant
Short Lead Time: 2 Weeks
Applications
Embedded Applications
o Industrial, Medical, and Avionics
o Security/Surveillance Systems
o Office Automation
o Digital Signage, POS and others
Consumer Electronics
o Smart TV, Blu-ray, STB
Communications/Networking
Storage
______________________________________________________________________________________________________________________________________________
DSC556-03
Page 1
MK-Q-B-P-D-130416-01-1




Discera

DSC556-03 Datasheet Preview

DSC556-03 Datasheet

Two Output PCIe Gen1 Clock Generator

No Preview Available !

DSC556-03
Crystal-less Two Output PCIe Gen1/2/3 Clock Generator
Specifications (Unless specified otherwise: T=25° C, VDD =3.3V)
Parameter
Supply Voltage1
Supply Current
Supply Current2
(Two HCSL Outputs)
Frequency Stability
Startup Time3
Input Logic Levels
Input logic high
Input logic low
Output Disable Time4
Output Enable Time
Pull-Up Resistor2
Condition
Min.
Typ.
Max. Unit
VDD
2.25
IDD
EN pin low – outputs are
disabled
EN pin high – outputs are
IDD
enabled
RL=50 , FO1=FO2=100 MHz
Includes frequency variations
f
due to initial tolerance, temp.
and power supply voltage
tSU
3.6
V
21
23
mA
60
mA
±100
±50
5
ppm
ms
VIH
0.75xVDD
-
V
VIL
-
0.25xVDD
tDA
5
ns
tEN
20
ns
Pull-up on OE pin
40
k
Parameter
Output Logic Levels
Output logic high
Output logic low
Pk to Pk Output Swing
Output Transition time4
Rise Time
Fall Time
Frequency
Output Duty Cycle
Period Jitter5
Jitter, Phase
(Common Clock
Architecture)
VOH
VOL
tR
tF
f0
SYM
JPER
TJ
HCSL Outputs
Condition
RL=50
Single-Ended
20% to 80%
RL=50, CL= 2pF
Single Frequency
Differential
FO1=FO2=100 MHz
PCIe Gen 1.1
Min.
0.725
-
200
2.3
48
Notes:
1. VDD should be filtered with 0.01uf capacitor.
2. Output is enabled if OE pin is floated or not connected.
3. tsu is time to 100PPM stable output frequency after VDD is applied and outputs are enabled.
4. Output Waveform and Connection Diagram define the parameters.
5. Period Jitter includes crosstalk from adjacent output.
6. Contact Sales@Discera.com for alternative frequency options
7. Jitter limits established by Gen 1.1 PCIe standards.
Typ.
750
1006
2.5
17.0
Max.
-
0.1
400
200
52
86.07
Unit
V
mV
ps
MHz
%
psRMS
PsRMS
______________________________________________________________________________________________________________________________________________
DSC556-03
Page 2
MK-Q-B-P-D-130416-01-1


Part Number DSC556-03
Description Two Output PCIe Gen1 Clock Generator
Maker Discera
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