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PONE-000-01 - The ideal device

Description

Table 1 CEWay PL-One Pin Descriptions Symbol P0.0 P0.7 P1.0 P1.7 P2.0 P2.7 P3.0, P3.1 P3.3 P3.7 XTAL2 PIN Description 5, 7, 12, 13, Port 0: 8-bit bi-directional I/O port 14, 15, 16, 17 Port Pin Alternative Function P0.0 A/D0 P0.1 A/D1 P0.2 A/D2 P0.3 A/D

Features

  • CEBus power line Physical Layer.
  • Power line medium dependent Physical and Symbol Encoding Sublayers.
  • Proprietary DSP for superior signal Reception in noisy environments.
  • M8052 core microcontroller.
  • 4 SFRs for communication between PLSES and M8052.
  • Up to 64 KB of external data memory.
  • 256 bytes of internal data memory.
  • Up to 64 KB of external code memory (can be extended with bank switching).
  • Three 16-bit timer/coun.

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Datasheet Details

Part number PONE-000-01
Manufacturer Domosys
File Size 504.12 KB
Description The ideal device
Datasheet download datasheet PONE-000-01 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com P1.4 P1.3 P0.1 P1.2 P0.0 P1.1 VDD P1.0 VSS RESET* P3.7 AGND RSVD VREF RSVD CEBin AVCC CEWay™ is a family of chips developed by DOMOSYS Corporation to meet the requirements of the residential and commercial local area networks (LANs). The CEWay PL-One is the ideal device for simple nodes, such as switches, actuators and sensors. It integrates the complete Physical Layer of the CEBus ® standard (EIA-600) and an M8052 core microcontroller. It provides you with all of the resources you need to embed the upper layers of the CEBus standard and the user application into a single-chip solution. The CEWay PL-One is designed for superior performance in noisy power line environments. 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 P1.5 VDD P0.2 P0.3 P0.4 P0.
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