Description
Input High Voltage Input Low Voltage Supply Voltage Sym VIH VIL Vcc Min 2.2 -0.3 3.0 Max Vcc+0.5 0.8 3.6 Units V V V AC Test Conditions Input Pulse Levels Input Rise and Fall Times (Max) Input and Output Timing Levels Output Load VSS to 3.0V 1.5ns 1.5V See Figure 1 Capacitance (f=1.0MHz, VIN=VCC or VSS) Parameter Address Lines Data Lines Control Lines Sym CA CD/Q CC Max 8 17 15 Unit pF pF pF Figure 1 DC (f=1.0MHz, VIN=VCC or VSS) Parameter Power Supply Current: Operating CMOS Standby TTL Standby Input Leakage Current Output Leakage Current Output High Voltage Output Low Voltage Sym ICC1 Conditions Device Selected; all inputs ≤VIL or ≥VIH; cycle time ≥tKC MIN; VCC=MAX; outputs open Device deselected; VCC=MAX; all inputs ≤ VSS +0.2 or ≥ VCC -0.2.
Key Features
- DSP Memory Solution
- One Research Drive
- Westborough, MA 01581 USA
- 508-366-5151
- FAX 508-836-4850
