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ESS3210 Datasheet

ES3210

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A
ESS Technology, Inc.
ES3210
Video CD Processor
Product Brief
DESCRIPTION
The ES3210 Video CD processor is a highly integrated,
high quality and cost-effective single-chip solution for Video
CD players. Based upon ESS’s Programmable Multimedia
Processor (PMP) architecture, the ES3210 integrates
MPEG1 video and audio processing and a full MPEG
system stream parser. The ES3210 is fully programmable
and incorporates a RISC-based 32-bit processor as an on-
chip video controller (VC) and a supporting 64-bit
processor core that functions as an on-chip video
processor (VP).
The VC module can be used as a microcontroller to provide
system and user interface controls, while also being able to
support embedded systems applications. The VP module
performs MPEG audio and video processing operations
such as arbitrary scaling, video standards conversion and
video filtering. The MPEG1 system layer bitstream is
decoded at up to 9 Mb/s at Standard Intermediate Format
(SIF) resolution with a picture rate of 30 f/s. Two channels
of MPEG layer 1 or audio layer 2 are decoded
simultaneously.
The ES3210 includes SmartScaleTM technology for advanced
scaling techniques, SmartStreamTM technology for video
error concealment, and SmartZoomTM technology for
enabling in/out zooming of a particular area of a still picture.
Additional features include DiscScan, TrackScan, QuickScan, On-
Screen-Display (OSD), Karaoke, Playback Control (PBC) for
Video CD 2.0, Smart Art and entertainment game software.
The incoming MPEG1 bit stream from a video CD is passed
to the ES3210 through its five-wire TDM serial bus, parses the
system layer and demultiplexes the video and audio
channels. Video is decoded and output as YUV or RGB
digital pixels to an NTSC or PAL video DAC/encoder, then
to the screen. Audio is decoded and passed to the
speakers via the audio serial bus, then to an audio DAC.
The ES3210 also has general-purpose auxiliary pins and
an integrated audio Digital-to-Analog Converter (DAC)
interface to reduce the need for external audio glue logic.
When coupled with the ES3207 Video CD Companion
Chip, echo cancellation and vocal reverb are also
supported. The echo cancellation feature removes
unwanted acoustic reflection from the audio output, while
the vocal reverb feature simulates a theater acoustic
environment.
The ES3210 is available in an industry-standard 100-pin
Thin Quad Flat Pack (TQFP) device package.
FEATURES
Single-chip Video CD processor in a 100-pin TQFP
package.
Programmable Multimedia Processor (PMP) architecture.
MPEG1 video/audio decoder and system parser.
Video CD 1.1 and 2.0, and Audio CD compatible.
On-chip video interlacing hardware incorporated.
Color Space Conversion (CSC) function supported.
STC interpretation and video/audio Phase-lock Loop (PLL)
Power management
3.3V power supply with 5V tolerant I/Os.
8- and 16-bit YUV output supported.
On-chip On Screen Display (OSD) controller supports
karaoke lyric and subtitle text display functions.
Video
Playback Control (PBC) for Video CD 2.0 supported.
Trick mode functions such as Repeat, Goto, and Set A-B
supported.
SmartScaleTM for NTSC to PAL conversion and vice versa
supported.
SmartZoomTM for motion zoom and pan supported.
SmartStreamTM for video error concealment supported.
Video Fader for fading video image in and out supported.
Audio
CD block decoder functions supported.
256/384 frame sync audio system clocks supported.
Programmable master clock for external audio DAC.
Independent bit clock for audio transmit and receive.
3DSound and surround sound supported.
Software Support
Software stack support for the TCP/IP protocols defined by
RFC 791 and RFC 793.
Software stack support for the POP3, SMTP and SNMP
Internet e-mail protocols defined by RFC 821, RFC
1157and RFC 2449.
Software stack support provided for the HTTP Web
browsing protocol defined by RFC 1945, RFC 2068 and
RFC2616.
Software stack support provided for RTP payload format for
MPEG-1/2 and H.261 video streaming protocols defined by
Character generation and software support for English,
Big 5/GB Chinese and Japanese fonts.
Software support for infrared remote control and wireless
keyboard.
ESS Technology, Inc.
SAM0417-051701
1




ESS

ESS3210 Datasheet Preview

ESS3210 Datasheet

ES3210

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A
ES3210 PINOUT
Figure 1 shows the ES3210 device pinout.
ES3210 PRODUCT BRIEF
ES3210 PINOUT
VPP
LA12
LA13
LA14
LA15
LA16
LA17
ACLK
AOUT/SEL_PLL0
ATCLK
ATFS/SEL_PLL1
DOE#
AIN
ARCLK
ARFS
TDMCLK
TDMDR
TDMFS
CAS#
VSS
8180 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 5150
82 49
83 48
84 47
85 46
86 45
87 44
88 43
ES321089 42
90 41
91 40
92
93
100-pin PQFP
39
38
94 37
95 36
96 35
97 34
98 33
99 32
100 31
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
VSS
AUX4
AUX3
AUX2
AUX1
AUX0
PCLK
PCLK2X
CPUCLK
HSYNC
VSYNC
YUV7
YUV6
YUV5
YUV4
YUV3
YUV2
YUV1
YUV0
VDD
Figure 1 ES3210 Pinout Diagram
ES3210 PIN DESCRIPTION
Table 1 lists the ES3210 pin descriptions.
Table 1 ES3210 Pin Description
Name
Number
I/O
VDD
1, 31, 51
I
RAS#
2O
DWE#
3O
MA[8:0]
12:4 O
DBUS[15:0]
28:13
I/O
RESET#
29 I
VSS
30, 50, 80, 100 I
YUV[7:0]
39:32
O
VSYNC
40 I/O
HSYNC
41 I/O
CPUCLK
42 I
PCLK2X
43 I/O
Definition
Voltage supply for 3.3V.
DRAM row address strobe (active low).
DRAM write enable (active low).
DRAM multiplexed row and column address bus.
DRAM data bus I/O [15:0].
System reset (active low).
Ground.
YUV[7:0] pixel output data.
Vertical sync for screen video interface, programmable for rising or falling edge.
Horizontal sync for screen video interface, programmable for rising or falling edge.
RISC and system clock input. CPUCLK is used only if SEL_PLL[1:0] = 00.
Pixel clock; two times the actual pixel clock for screen video interface.
2 SAM0417-051701
ESS Technology, Inc.


Part Number ESS3210
Description ES3210
Maker ESS
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