Datasheet Details
| Part number | CH7202 |
|---|---|
| Manufacturer | Unknown Manufacturer |
| File Size | 110.04 KB |
| Description | MPEG to TV Encoder with 8-bit Input |
| Datasheet |
 CH7202 Datasheet
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General Description
The CH7202 video encoder integrates a dual PLL clock generator and a digital NTSC/PAL video encoder.
Key Features
- Outputs NTSC, PAL (B,D,G,H,I) and PAL-M (NTSCJ or PAL-60 available as options).
- 8-bit YCrCb (4:2:2) input format.
- Master or slave mode operation.
- Triple 9-bit DAC for composite and S-video output.
- 27 MHz DAC operating frequency eliminates the need for 1/sinc(x) correction filter.
- Low-jitter phase-locked loop circuitry operates using a low-cost 14.31818 MHz crystal.
- 40.5 or 33.9 MHz video decoder clock output.
- 16.934 or 11.2.