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PEEL18CV8JI-15 - CMOS Programmable Electrically Erasable Logic Device

Download the PEEL18CV8JI-15 datasheet PDF. This datasheet also covers the PEE variant, as both devices belong to the same cmos programmable electrically erasable logic device family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (PEE-L18CV.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number PEEL18CV8JI-15
Manufacturer Unknown Manufacturer
File Size 411.95 KB
Description CMOS Programmable Electrically Erasable Logic Device
Datasheet download datasheet PEEL18CV8JI-15 Datasheet

General Description

The PEEL18CV8 is a Programmable Electrically Erasable Logic (PEEL) device providing an attractive alternative to ordinary PLDs.

The PEEL18CV8 offers the performance, flexibility, ease of design and production practicality needed by logic designers today.

The PEEL18CV8 is available in 20-pin DIP, PLCC, SOIC and TSSOP packages with speeds ranging from 5ns to 25ns with power consumption as low as 37mA.

Overview

® International CMOS Technology Commercial/ Industrial PEEL™ 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic.

Key Features

  • s Multiple Speed Power, Temperature Options - VCC = 5 Volts ±10% - Speeds ranging from 5ns to 25 ns - Power as low as 37mA at 25MHz - Commercial and industrial versions available CMOS Electrically Erasable Technology - Superior factory testing - Reprogrammable in plastic package - Reduces retrofit and development costs Development / Programmer Support - Third party software and programmers - ICT PLACE Development Software and PDS-3 programmer - PLD-to-PEEL JEDEC file translator s Architectura.

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