QL2009-XPB256I Datasheet | Unknown Manufacturer

3.3V and 5.0V pASIC 2 FPGA bining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS ® QL2009 Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance -Design tools produce fast, efficient Verilog/VHDL synthesis Speed, Density, Low Cost and Flexibility in One Device … 9,000 usable ASIC gates, 225 I/O pins -16-bit counter speeds exceeding 200 MHz -9,000 usable ASIC gates, 16,000 usable PLD gates, 225 I/Os -3-layer metal ViaLink® process for small die sizes -100% routable and pin-out maintainable 3 pASIC 2 Advanced Logic Cell and I/O Capabilities -plex...