QL4016-4PF100I Datasheet | Unknown Manufacturer

Overview The Quick RAM family of ESPs (Embedded Standard Products) offers FPGA logic in bination with Dual-Port SRAM modules. The QL4016 is a 16,000 usable PLD gate member of the Quick RAM family of ESPs. Quick RAM ESPs are fabricated on a 0.35 µm four-layer metal process using Quick Logic's patented Via LinkTM technology to provide a unique bination of high performance, high density, low cost, and extreme ease-of-use. The QL4016 contains 320 logic cells and 10 Dual Port RAM modules (see Figure 1). Each RAM module has 1,152 RAM bits, for a total of 11,520 bits. RAM Modules are Dual Port (one read port, one write port) and can be configured into one of four modes: 64 (deep) × 18 (wide), 128 × 9, 256 × 4, or 512 × 2 (see Figure 4). With a maximum of 82 I/Os, the QL4016 is available in 84-pin PLCC, 100-pin TQFP, 100-pin CQFP and 144-pin TQFP packages. Designers can cascade multiple RAM modules to increase the depth or width allowed in single modules by connecting corresponding address lines together and dividing the words between modules (see Figure 2). This approach allows up to 512-deep configurations as large as 16 bits wide in the smallest Quick RAM device and 44 bits wide in the largest device. Software support for the plete Quick RAM family, including the QL4016, is available through two basic packages. The turnkey Quick WorksTM package provides the most plete ESP software solution from design entry to logic synthesis, to place and route, to simulation. The Quick Tools package provides a solution for designers who use Cadence, Exemplar, Mentor, Synopsys, Synplicity, Viewlogic, Aldec, or other third-party tools for design entry, synthesis, or simulation. The Quick LogicTM variable...