UT54ACS138
Key Features
- High speed
- Single 5 volt supply
- Available QML Q or V processes
- Flexible package - 16-pin DIP - 16-lead flatpack DESCRIPTION The UT54ACS138 and the UT54ACTS138 3-line to 8-line decoders/demultiplexers are designed to be used in high-performance memory-decoding or data-routing applications requiring very short propagation delay times. The conditions at the binary select inputs and the three enable inputs select one of eight output lines. Two active-low and one active-high enable inputs reduce the need for external gates of inverters when expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one inverter. An enable input can be used as a data input for demultiplexing applications. The devices are characterized over full military temperature range of -55 C to +125 C. FUNCTION TABLE