* Double-data-rate architecture; two data transfers per clock cycle
* The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture
* Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the re
EBE42AE8ACFA Datasheet (362.81 KB)
EBE42AE8ACFA
Elpida Memory
362.81 KB
4gb registered ddr2 sdram dimm.
DATA SHEET www.DataSheet4U.com 4GB Registered DDR2 SDRAM DIMM EBE42AE8ACFA (512M words × 72 bits, 4 Ranks) Specifications Density: 4GB
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