* Double-data-rate architecture; two data transfers per clock cycle
* The high-speed data transfer is realized by the 2 bits prefetch pipelined architecture
* Bi-directional data strobe (DQS) is transmitted /received with data for capturing data at the receiver
* Data
EDD2508AETA Datasheet (648.64 KB)
EDD2508AETA
Elpida Memory
648.64 KB
(edd2508aeta / edd2516aeta) 256m bits ddr sdram.
DATA SHEET 256M bits DDR SDRAM EDD2508AETA (32M words × 8 bits) EDD2516AETA (16M words × 16 bits) Specifications Density: 256M bits
📁 Related Datasheet
EDD2508AKTA-5 256M bits DDR SDRAM (32M words x 8 bits DDR400) (Elpida Memory)
EDD2508AKTA-5-E 256M bits DDR SDRAM (32M words x 8 bits DDR400) (Elpida Memory)
EDD2504AKTA 256M bits DDR SDRAM (64M words x 4 bits) (Elpida Memory)
EDD2504AKTA 256M bits DDR SDRAM (64M words x 4 bits) (Elpida Memory)
EDD2504AKTA-E 256M bits DDR SDRAM (64M words x 4 bits) (Elpida Memory)
EDD2504AKTA-E 256M bits DDR SDRAM (64M words x 4 bits) (Elpida Memory)
EDD2516AETA (EDD2508AETA / EDD2516AETA) 256M bits DDR SDRAM (Elpida Memory)
EDD2516AKTA-5-E 256M bits DDR SDRAM (16M words x16 bits DDR400) (Elpida Memory)
EDD2516AKTA-E 256M bits DDR SDRAM (16M words x16 bits DDR400) (Elpida Memory)
EDD10161BBH-TS 1G bits DDR Mobile RAM (Elpida Memory)
