EM42AM1684RTC Description
Internal Double-Date-Rate architecture with twice accesses per clock cycle. Single 2.5V ±0.2V Power Supply 2.5V SSTL-2 patible I/O Burst Length (B/L) of 2, 4, 8 2.5, 3 clock read latency Bi-directional, intermittent data strobe (DQS) All inputs except data and DM are sampled at the positive edge of the system clock. The 256Mb DDR SDRAM uses a double data rate architecture to acplish high-speed operation.
EM42AM1684RTC Key Features
- Internal Double-Date-Rate architecture with twice accesses per clock cycle
- Single 2.5V ±0.2V Power Supply
- 2.5V SSTL-2 patible I/O
- Burst Length (B/L) of 2, 4, 8
- 2.5, 3 clock read latency
- Bi-directional, intermittent data strobe (DQS)
- All inputs except data and DM are sampled at the positive edge of the system clock
- Data Mask (DM) for write data
- Sequential & Interleaved Burst type available
- Auto precharge option for each burst accesses