Overview: ESP32 Series
Datasheet Version 4.6
2.4 GHz Wi-Fi + Bluetooth® + Bluetooth LE SoC
Including:
ESP32-D0WD-V3 ESP32-D0WDR2-V3 ESP32-U4WDH ESP32-S0WD – Not Recommended for New Designs (NRND) ESP32-D0WD – Not Recommended for New Designs (NRND) ESP32-D0WDQ6 – Not Recommended for New Designs (NRND) ESP32-D0WDQ6-V3 – Not Recommended for New Designs (NRND)
www.espressif.com Product Overview ESP32 is a single 2.4 GHz Wi-Fi-and-Bluetooth combo chip designed with the TSMC low-power 40 nm technology. It is designed to achieve the best power and RF performance, showing robustness, versatility and reliability in a wide variety of applications and power scenarios.
The ESP32 series of chips includes ESP32-D0WD-V3, ESP32-D0WDR2-V3, ESP32-U4WDH, ESP32-S0WD (NRND), ESP32-D0WDQ6-V3 (NRND), ESP32-D0WD (NRND), and ESP32-D0WDQ6 (NRND), among which,
• ESP32-S0WD (NRND), ESP32-D0WD (NRND), and ESP32-D0WDQ6 (NRND) are based on chip revision v1 or chip revision v1.1.
• ESP32-D0WD-V3, ESP32-D0WDR2-V3, ESP32-U4WDH, and ESP32-D0WDQ6-V3 (NRND) are based on chip revision v3.0 or chip revision v3.1.
For details on part numbers and ordering information, please refer to Section 1 ESP32 Series Comparison. For details on chip revisions, please refer to ESP32 Chip Revision v3.0 User Guide and ESP32 Series SoC Errata.
The functional block diagram of the SoC is shown below. In-Package Flash or PSRAM
SPI IC IS SDIO UART
TWAI®
ETH RMT PWM Touch sensor DAC ADC Timers Switch Balun Bluetooth link
controller Bluetooth baseband Wi-Fi MAC Wi-Fi baseband RF receive
Clock generator
RF transmit Core and memory 2 (or 1) x Xtensa® 32-bit
LX Microprocessors Cryptographic hardware acceleration SHA RSA ROM SRAM AES RNG PMU RTC
ULP coprocessor Recovery memory ESP32 Functional Block Diagram Espressif Systems 2 Submit Documentation Feedback ESP32 Series Datasheet v4.
