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Eutech Microelectronics

EUA2101A Datasheet Preview

EUA2101A Datasheet

10-W Stereo Class-D Audio Power Amplifier

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EUA2101A
10-W Stereo Class-D
Audio Power Amplifier
DESCRIPTION
The EUA2101A is a high efficiency, 2 channel bridged-tied
load (BTL), class-D audio power amplifier. Operating from
a 12V power supply, EUA2101A is capable of delivering
10W/ channel of continuous output power to a 8load
with 10% THD+N. The EUA2101A features a differential
input architecture offering improved noise immunity over a
single-ended (SE) input amplifier. Amplifier gain is
internally configured and can be selected to 20, 26, 32 or
36dB utilizing the Go and G1 gain select pins.
The EUA2101A also features short-circuit and thermal
protection preventing the device from being damaged
during a fault condition. The EUA2101A is available in
thermally efficient 48-pin TQFP package.
FEATURES
Wide Supply Voltage: 8V to 15V
Unique Modulation Scheme Reduces EMI Emission
10-W/ch into an 8-Load From a 12-V Supply
15-W/ch into an 4-Load From a 12-V Supply
90% Efficient Class-D Operation Eliminates
Need for Heat Sinks
Four Selectable, Gain Settings
Differential Inputs
Thermal and Short-Circuit Protection
Clock Output for Synchronization With Multiple
Class-D Devices
7mm × 7mm, 48-pin TQFP Package
RoHS compliant and 100% lead(Pb)-free
APPLICATIONS
Televisions
Typical Application Circuit
DS2101A Ver 1.1 July 2009
Figure1.
1




Eutech Microelectronics

EUA2101A Datasheet Preview

EUA2101A Datasheet

10-W Stereo Class-D Audio Power Amplifier

No Preview Available !

Pin Configurations
Package Type
EUA2101ATel: 0755-8398 3377 / 135 9011 2223 http://www.gofotech.com
Pin Configurations
(TOP VIEW)
TQFP-48
Pin Description
PIN TQFP-48 I/O
DESCRIPTION
SHUTDOWN
44
I
Shutdown signal for IC (LOW = disabled, HIGH = operational). TTL logic
levels with compliance to AVCC.
RINN
2 I Negative audio input for right channel. Biased at VREG/2.
RINP
LINN
LINP
GAIN0
3 I Positive audio input for right channel. Biased at VREG/2.
6 I Negative audio input for left channel. Biased at VREG/2.
5 I Positive audio input for left channel. Biased at VREG/2.
8 I Gain select least significant bit. TTL logic levels with compliance to VREG.
GAIN1
MUTE
FAULT
BSLP
PVCCL
LOUTP
9
45
46
18
26,27
19,20
I Gain select most significant bit. TTL logic levels with compliance to VREG.
I
Mute signal for quick disable/enable of outputs (HIGH = outputs high-Z,
LOW = outputs enabled). TTL logic levels with compliance to AVCC.
O
TTL compatible output. HIGH = short-circuit fault. LOW = no fault. Only
reports short-circuit faults. Thermal faults are not reported on this terminal.
I/O Bootstrap I/O for left channel, positive high-side FET.
Power supply for left channel H-bridge, not internally connected to PVCCR
or AVCC.
O Class-D 1/2-H-bridge positive output for left channel.
PGNDL
LOUTN
BSLN
VCLAMPL
VCLAMPR
28,29
21,22
23
30
31
Power ground for left channel H-bridge.
O Class-D 1/2-H-bridge negative output for left channel.
I/O Bootstrap I/O for left channel, negative high-side FET.
Internally generated voltage supply for left channel bootstrap capacitor.
Internally generated voltage supply for right channel bootstrap capacitor.
DS2101A Ver 1.1 July 2009
2


Part Number EUA2101A
Description 10-W Stereo Class-D Audio Power Amplifier
Maker Eutech Microelectronics
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