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Exar Corporation

XRT75R06D Datasheet Preview

XRT75R06D Datasheet

SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

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XRT75R06D
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
DECEMBER 2004
GENERAL DESCRIPTION
The XRT75R06D is a six channel fully integrated Line
Interface Unit (LIU) featuring EXAR’s R3 Technology
(Reconfigurable, Relayless, Redundancy) for E3/
DS3/STS-1 applications. The LIU incorporates 6
independent Receivers, Transmitters and Jitter
Attenuators in a single 217 Lead BGA package.
Each channel of the XRT75R06D can be
independently configured to operate in E3 (34.368
MHz), DS3 (44.736 MHz) or STS-1 (51.84 MHz).
Each transmitter can be turned off and tri-stated for
redundancy support or for conserving power.
The XRT75R06D’s differential receiver provides high
noise interference margin and is able to receive data
over 1000 feet of cable or with up to 12 dB of cable
attenuation.
The XRT75R06D incorporates an advanced crystal-
less jitter attenuator per channel that can be selected
either in the transmit or receive path. The jitter
attenuator performance meets the ETSI TBR-24 and
REV. 1.0.0
Bellcore GR-499 specifications. Also, the jitter
attenuators can be used for clock smoothing in
SONET STS-1 to DS-3 de-mapping.
The XRT75R06D provides a Parallel Microprocessor
Interface for programming and control.
The XRT75R06D supports analog, remote and digital
loop-backs. The device also has a built-in Pseudo
Random Binary Sequence (PRBS) generator and
detector with the ability to insert and detect single bit
error for diagnostic purposes.
APPLICATIONS
E3/DS3 Access Equipment
DSLAMs
Digital Cross Connect Systems
CSU/DSU Equipment
Routers
Fiber Optic Terminals
FIGURE 1. BLOCK DIAGRAM OF THE XRT 75R06D
CS
RD
WR
Addr[7:0]
D[7:0]
PCLK
RDY
INT
Pmode
RESET
RTIP_n
RRing_n
TTIP_n
TRing_n
MTIP_n
MRing_n
DMO_n
ICT
µProcessor Interface
XRT75R06D
XRT75R06D
Peak Detector
AGC/
Equalizer
Slicer
Local
LoopBack
Clock & Data
Recovery
LOS
Detector
Clock
Synthesizer
Jitter
Attenuator
MUX
Remote
LoopBack
HDB3/
B3ZS
Decoder
Line
Driver
Device
Monitor
Tx
Pulse
Shaping
Tx
Control
Timing
Control
Jitter
Attenuator
MUX
HDB3/
B3ZS
Encoder
Channel 0
Channel n...
Channel 5
CLKOUT_n
SFM_en
RLOL_n
E3Clk
DS3Clk
STS-Clk/12M
RxClk_n
RxPOS_n
RxNEG/LCV_n
RLOS_n
TxClk_n
TxPOS_n
TxNEG_n
TxON
PART NUMBER
XRT75R06DIB
ORDERING INFORMATION
PACKAGE
217 Lead BGA
OPERATING TEMPERATURE RANGE
-40°C to +85°C
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com




Exar Corporation

XRT75R06D Datasheet Preview

XRT75R06D Datasheet

SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

No Preview Available !

XRT75R06D
áç
REV. 1.0.0
SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
FEATURES
RECEIVER
R3 Technology (Reconfigurable, Relayless,
Redundancy)
On chip Clock and Data Recovery circuit for high
input jitter tolerance
Meets E3/DS3/STS-1 Jitter Tolerance Requirement
Detects and Clears LOS as per G.775
Receiver Monitor mode handles up to 20 dB flat
loss with 6 dB cable attenuation
On chip B3ZS/HDB3 encoder and decoder that can
be either enabled or disabled
On-chip clock synthesizer provides the appropriate
rate clock from a single 12.288 MHz Clock
Provides low jitter output clock
TRANSMITTER
R3 Technology (Reconfigurable, Relayless,
Redundancy)
Compliant with Bellcore GR-499, GR-253 and ANSI
T1.102 Specification for transmit pulse
Tri-state Transmit output capability for redundancy
applications
Each Transmitter can be independently turned on
or off
Transmitters provide Voltage Output Drive
JITTER ATTENUATOR
On chip advanced crystal-less Jitter Attenuator for
each channel
Jitter Attenuator can be selected in Receive,
Transmit path, or disabled
Meets ETSI TBR 24 Jitter Transfer Requirements
Compliant with jitter transfer template outlined in
ITU G.751, G.752, G.755 and GR-499-CORE,1995
standards
16 or 32 bits selectable FIFO size
CONTROL AND DIAGNOSTICS
Parallel Microprocessor Interface for control and
configuration
Supports optional internal Transmit driver
monitoring
Each channel supports Analog, Remote and Digital
Loop-backs
Single 3.3 V ± 5% power supply
5 V Tolerant digital inputs
Available in 217 pin BGA Package
- 40°C to 85°C Industrial Temperature Range
TRANSMIT INTERFACE CHARACTERISTICS
Accepts either Single-Rail or Dual-Rail data from
Terminal Equipment and generates a bipolar signal
to the line
Integrated Pulse Shaping Circuit
Built-in B3ZS/HDB3 Encoder (which can be
disabled)
Accepts Transmit Clock with duty cycle of 30%-
70%
Generates pulses that comply with the ITU-T G.703
pulse template for E3 applications
Generates pulses that comply with the DSX-3 pulse
template, as specified in Bellcore GR-499-CORE
and ANSI T1.102_1993
Generates pulses that comply with the STSX-1
pulse template, as specified in Bellcore GR-253-
CORE
Transmitter can be turned off in order to support
redundancy designs
RECEIVE INTERFACE CHARACTERISTICS
Integrated Adaptive Receive Equalization (optional)
for optimal Clock and Data Recovery
Declares and Clears the LOS defect per ITU-T
G.775 requirements for E3 and DS3 applications
Meets Jitter Tolerance Requirements, as specified
in ITU-T G.823_1993 for E3 Applications
Meets Jitter Tolerance Requirements, as specified
in Bellcore GR-499-CORE for DS3 Applications
Declares Loss of Lock (LOL) Alarm
Built-in B3ZS/HDB3 Decoder (which can be
disabled)
Recovered Data can be muted while the LOS
Condition is declared
Outputs either Single-Rail or Dual-Rail data to the
Terminal Equipment
2


Part Number XRT75R06D
Description SIX CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
Maker Exar Corporation
Total Page 30 Pages
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