s 3-STATE outputs for data bus applications s Buffered inputs minimize loading s Address decoding on-chip s Diode clamped inputs minimize ringing Ordering Code: Order N.

s Buffered inputs minimize loading s Address decoding on-chip s Diode clamped inputs minimize ringing Ordering Code: O.

The F189 is a high-speed 64-bit RAM organized as a 16word by 4-bit array. Address inputs are buffered to minimize loading and are fully decoded on-chip. The outputs are 3-STATE and are in the high impedance state whenever the Chip Select (CS) input i.

74F1804

74F1805

74F1808

74F181

74F182

74F1832

74F189A

74F10

74F1056

74F1071

74F109

74F11

74F112