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74F64 - 4-2-3-2-Input AND-OR-Invert Gate

Description

This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function.

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74F64 4-2-3-2-Input AND-OR-Invert Gate April 1988 Revised March 1999 74F64 4-2-3-2-Input AND-OR-Invert Gate General Description This device contains gates configured to perform a 4-2-3-2 input AND-OR-INVERT function. Ordering Code: Order Number 74F64SC 74F64SJ 74F64PC Package Number M14A M14D N14A Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol IEEE/IEC Connection Diagram Unit Loading/Fan Out U.L. Pin Names An, Bn, Cn, Dn O Description HIGH/LOW Inputs Output 1.0/1.0 50/33.
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