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Fairchild Semiconductor Electronic Components Datasheet

NDB7060L Datasheet

N-Channel Logic Level Enhancement Mode Field Effect Transistor

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June 1996
NDP7060L / NDB7060L
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Features
These logic level N-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
75A, 60V. RDS(ON) = 0.015@ VGS = 5V
Low drive requirements allowing operation directly from logic
drivers. VGS(TH) < 2.0V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through hole
and surface mount applications.
________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol Parameter
TC = 25°C unless otherwise noted
NDP7060L
VDSS Drain-Source Voltage
VDGR
Drain-Gate Voltage (RGS < 1 M)
VGSS Gate-Source Voltage - Continuous
- Nonrepetitive (tP < 50 µs)
ID Drain Current - Continuous
- Pulsed
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG Operating and Storage Temperature Range
60
60
± 20
± 40
75
225
150
1
-65 to 175
NDB7060L
Units
V
V
V
A
W
W/°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP7060L Rev. B2 / NDB7060L Rev. C


Fairchild Semiconductor Electronic Components Datasheet

NDB7060L Datasheet

N-Channel Logic Level Enhancement Mode Field Effect Transistor

No Preview Available !

Electrical Characteristics (TC = 25°C unless otherwise noted)
Symbol Parameter
Conditions
DRAIN-SOURCE AVALANCHE RATINGS (Note 1)
W DSS
Single Pulse Drain-Source Avalanche
Energy
VDD = 25 V, ID = 75 A
IAR Maximum Drain-Source Avalanche Current
OFF CHARACTERISTICS
BVDSS
IDSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA
VDS = 60 V, VGS = 0 V
IGSSF Gate - Body Leakage, Forward
IGSSR Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 1)
VGS(th)
Gate Threshold Voltage
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS = 0 V
VDS = VGS, ID = 250 µA
RDS(ON) Static Drain-Source On-Resistance
VGS = 5 V, ID = 37.5 A
ID(on) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 1)
tD(on) Turn - On Delay Time
tr Turn - On Rise Time
tD(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VGS = 5 V, VDS = 10 V
VDS = 10 V, ID = 37.5 A
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
VDD = 30 V, ID = 75 A,
VGS = 5 V, RGEN = 10
RGS = 10
VDS = 48 V,
ID = 75 A, VGS = 5 V
Min Typ Max Units
550 mJ
75 A
60
TJ = 125°C
V
250 µA
1 mA
100 nA
-100 nA
TJ = 125°C
TJ = 125°C
1 1.3
2
0.65 0.8 1.5
0.01 0.015
0.016 0.024
75
15 67
V
A
S
4200
1100
310
4000
1600
800
pF
pF
pF
23 40
460 600
100 150
270 400
86 115
13
62
nS
nS
nS
nS
nC
nC
nC
NDP7060L Rev. B2 / NDB7060L Rev. C


Part Number NDB7060L
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Maker Fairchild
Total Page 6 Pages
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