74ACT652 Datasheet | Fairchild Semiconductor

Description The ACT652 consists of bus transceiver circuits with Dtype flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes to the HIGH logic level. Output Enable pins (OEAB, OEBA) are provided to control the transceiver function. Features s Independent registers for A and B buses s Multiplexed real-time and stored data s Outputs source/sink 24 m A s TTL-patible inputs Ordering Code: Order Number 74ACT652SC 74ACT652MTC 74ACT652SPC Package Number M24B MTC24 N24C Package Description 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols IEEE/IEC Connection Diagram Pin Descriptions Pin Names A0- A7, B0- B7 CPAB, CPBA SAB, SBA OEAB, OEBA Description A and B Inputs/3-STATE Outputs Clock Inputs Select Inputs Output Enable Inputs FACT is a trademark of Fairchild Semiconductor Corporation. © 2000 Fairchild Semiconductor Corporation DS500310 .fairchildsemi. Function Table Inputs OEAB L L X H L L L L H H H OEBA H H H H X L L L H H L CPAB H or L CPBA H or L SAB X X X X X X X X L H H SBA X X X X X X L H X X H Output Output Input Output Input Input Not Specified Output Output Not Specified Output Input Input Input Inputs/Outputs (Note 1) A0 thru A7 Input B0 thru B7 Input Isolation Store A and B Data Store A, Hold B Store A in Both Registers Hold A, Store B Store B in Both Registers Real-Time B Data to A Bus Store B Data to A Bus Real-Time A Data to B Bus Stored A Data to B Bus Stored A Data to B Bus and Stored B Data to A Bus H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock...