74F148 Datasheet | Fairchild Semiconductor

Description The F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits. Features s Encodes eight data lines in priority s Provides 3-bit binary priority code s Input enable capability s Signals when data is present on any input s Cascadable for priority encoding of n bits Ordering Code: Order Number 74F148SC 74F148SJ 74F148PC Package Number M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Truth Table Inputs EI H L L L L L L L L L I0 X H X X X X X X X L I1 X H X X X X X X L H I2 X H X X X X X L H H I3 X H X X X X L H H H I4 X H X X X L H H H H I5 X H X X L H H H H H I6 X H X L H H H H H H Outputs I7 GS A0 A1 A2 EO X H L H H H H H H H H H L L L L L L L L H H L H L H L H L H H H L L H H L L H H H H L L L L H H H H H L H H H H H H H H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial © 1999 Fairchild Semiconductor Corporation DS009480 .fairchildsemi. Unit Loading/Fan Out U.L. Pin Names I0 I1- I7 EI EO GS A0- A2 Description HIGH/LOW Priority Input (Active LOW) Priority Inputs (Active LOW) Enable Input (Active LOW) Enable Output (Active LOW) Group Signal Output (Active LOW) Address Outputs (Active LOW) 1.0/1.0 1.0/2.0 1.0/1.0 50/33.3 50/33.3 50/33.3 Input IIH/IIL Output IOH/IOL 20 µA/- 0.6 m A 20 µA/- 1.2 m A 20 µA/- 0.6 m A - 1 m A/20 m A - 1 m A/20 m A - 1 m A/20 m A Functional Description The F148 8-input priority encoder accepts data from eight active LOW inputs (I0- I7) and provides a binary representation...