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Fairchild Semiconductor Electronic Components Datasheet

74LVTH240 Datasheet

Low Voltage Octal Buffer/Line Driver

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January 2008
74LVT240, 74LVTH240
Low Voltage Octal Buffer/Line Driver with 3-STATE Outputs
Features
Input and output interface capability to systems at
5V VCC
Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH240),
also available without bushold feature (74LVT240)
Live insertion/extraction permitted
Power Up/Down high impedance provides glitch-free
bus loading
Outputs source/sink –32mA/+64mA
Functionally compatible with the 74 series 240
Latch-up performance exceeds 500mA
ESD performance:
– Human-body model > 2000V
– Machine model > 200V
– Charged-device model > 1000V
General Description
The LVT240 and LVTH240 are inverting octal buffers
and line drivers designed to be employed as memory
address drivers, clock drivers and bus oriented transmit-
ters or receivers which provides improved PC board
density.
The LVTH240 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These octal buffers and line drivers are designed for low-
voltage (3.3V) VCC applications, but with the capability to
provide a TTL interface to a 5V environment. The LVT240
and LVTH240 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining low power dissipation.
Ordering Information
Package
Order Number Number
Package Description
74LVT240WM
74LVT240SJ
74LVT240MSA
74LVT240MTC
M20B
M20D
MSA20
MTC20
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74LVTH240WM
74LVTH240SJ
74LVTH240MSA
M20B
M20D
MSA20
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), JEDEC MO-150, 5.3mm Wide
74LVTH240MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1999 Fairchild Semiconductor Corporation
74LVT240, 74LVTH240 Rev. 1.5.0
www.fairchildsemi.com


Fairchild Semiconductor Electronic Components Datasheet

74LVTH240 Datasheet

Low Voltage Octal Buffer/Line Driver

No Preview Available !

Connection Diagrams
Logic Symbols
IEEE/IEC
Pin Descriptions
Pin Names
OE1, OE2
I0–I7
O0–O7
Description
3-STATE Output Enable Inputs
Inputs
3-STATE Outputs
Truth Tables
Inputs
OE1
L
L
H
In
L
H
X
Inputs
OE2
L
In
L
LH
HX
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
Outputs
(Pins 12, 14, 16, 18)
H
L
Z
Outputs
(Pins 3, 5, 7, 9)
H
L
Z
©1999 Fairchild Semiconductor Corporation
74LVT240, 74LVTH240 Rev. 1.5.0
2
www.fairchildsemi.com


Part Number 74LVTH240
Description Low Voltage Octal Buffer/Line Driver
Maker Fairchild Semiconductor
Total Page 11 Pages
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