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74S280 - DM74S280

74S280 Description

DM74S280 9-Bit Parity Generator/Checker August 1986 Revised May 2000 DM74S280 9-Bit Parity Generator/Checker General .
These universal, nine-bit parity generators/checkers utilize Schottky-clamped TTL high-performance circuitry, and feature odd/even outputs to facilita.

74S280 Features

* s Generates either odd or even parity for nine data lines s Cascadable for N-bits s Can be used to upgrade existing systems using MSI par- ity circuits s Typical data-to-output delay

74S280 Applications

* The word-length capability is easily expanded by cascading. The DM74S280 can be used to upgrade the performance of most systems utilizing the DM74180 parity generator/ checker. Although the DM74S280 is implemented without expander inputs, the corresponding function is provided by the availability o

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Fairchild Semiconductor 74S280-like datasheet