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DM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear
September 1986 Revised February 2000
DM74ALS174 • DM74ALS175 Hex/Quad D-Type Flip-Flops with Clear
General Description
These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic. Both have an asynchronous clear input, and the quad (DM74ALS175) version features complementary outputs from each flip-flop. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or LOW level, the D input signal has no effect at the output.