s For use as: Scratch pad memory Buffer storage between processors Bit storage in fast multiplication designs s Separate read/write addressing permits simultaneous readin.

These register files are organized as 4 words of 4 bits each, and separate on-chip decoding is provided for addressing the four word locations to either write-in or retrieve data. This permits writing into one location, and reading from another word .

DM74LS645

DM74LS00

DM74LS02

DM74LS03

DM74LS04

DM74LS05

DM74LS08

DM74LS09

DM74LS10

DM74LS107A

DM74LS109A

DM74LS11

DM74LS112A