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Fairchild Semiconductor Electronic Components Datasheet

FAN3111 Datasheet

Low-Side Gate Driver

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January 2015
FAN3111 Single 1A High-Speed, Low-Side
Gate Driver
Features
1.4 A Peak Sink / Source at VDD = 12 V
1.1 A Sink / 0.9 A Source at VOUT = 6 V
4.5 to 18 V Operating Range
FAN3111C Compatible with FAN3100C Footprint
Two Input Configurations:
Dual CMOS Inputs Allow Configuration as
Non-Inverting or Inverting with Enable Function
Single Non-Inverting, Low-Voltage Input for
Compatibility with Low-Voltage Controllers
Small Footprint Facilitates Distributed Drivers for
Parallel Power Devices
15 ns Typical Delay Times
9 ns Typical Rise / 8 ns Typical Fall times with
470 pF Load
5-Pin SOT23 Package
Rated from 40°C to 125°C Ambient
Description
The FAN3111 1A gate driver is designed to drive an N-
channel enhancement-mode MOSFET in low-side
switching applications.
Two input options are offered: FAN3111C has dual
CMOS inputs with thresholds referenced to VDD for use
with PWM controllers and other input-signal sources
that operate from the same supply voltage as the driver.
For use with low-voltage controllers and other input-
signal sources that operate from a lower supply voltage
than the driver, that supply voltage may also be used as
the reference for the input thresholds of the FAN3111E.
This driver has a single, non-inverting, low-voltage input
plus a DC input VXREF for an external reference voltage
in the range 2 to 5 V.
The FAN3111 is available in a lead-free finish industry-
standard 5-pin SOT23.
Applications
Switch-Mode Power Supplies
Synchronous Rectifier Circuits
Pulse Transformer Driver
Logic to Power Buffer
Motor Control
VDD 1
GND 2
IN+ 3
5 OUT
4 IN
Figure 1. FAN3111C (Top View)
© 2008 Fairchild Semiconductor Corporation
FAN3111 Rev. 1.6
VDD 1
GND 2
IN+ 3
5 OUT
4 XREF
Figure 2. FAN3111E (Top View)
www.fairchildsemi.com


Fairchild Semiconductor Electronic Components Datasheet

FAN3111 Datasheet

Low-Side Gate Driver

No Preview Available !

Ordering Information
Part Number
FAN3111CSX
FAN3111ESX
Input
Threshold
CMOS
External
Package
5-Pin SOT23
5-Pin SOT23
Packing Method
Tape & Reel
Tape & Reel
Quantity per
Reel
3,000
3,000
Thermal Characteristics(1)
5-Pin SOT23
Package
JL(2)
58
JT(3)
102
JA(4)
161
JB(5)
53
JT(6) Units
6 °C/W
Notes:
1. Estimates derived from thermal simulation; actual values depend on the application.
2. Theta_JL (JL): Thermal resistance between the semiconductor junction and the bottom surface of all the leads
(including any thermal pad) that are typically soldered to a PCB.
3. Theta_JT (JT): Thermal resistance between the semiconductor junction and the top surface of the package,
assuming it is held at a uniform temperature by a top-side heatsink.
4. Theta_JA (ΘJA): Thermal resistance between junction and ambient, dependent on the PCB design, heat sinking,
and airflow. The value given is for natural convection with no heatsink using a 2S2P board,, as specified in
JEDEC standards JESD51-2, JESD51-5, and JESD51-7, as appropriate.
5. Psi_JB (JB): Thermal characterization parameter providing correlation between semiconductor junction
temperature and an application circuit board reference point for the thermal environment defined in Note 4. For
the MLP-8 package, the board reference is defined as the PCB copper connected to the thermal pad and
protruding from either end of the package. For the SOIC-8 package, the board reference is defined as the PCB
copper adjacent to pin 6.
6. Psi_JT (JT): Thermal characterization parameter providing correlation between the semiconductor junction
temperature and the center of the top of the package for the thermal environment defined in Note 4.
Pin Definitions
Pin # Name Description
1 VDD Supply Voltage. Provides power to the IC.
2 GND Ground. Common ground reference for input and output circuits.
3 IN+ Non-Inverting Input. Connect to VDD to enable output.
INFAN3111C Inverting Input. Connect to GND to enable output.
4
XREF FAN3111E External Reference Voltage. Reference for input thresholds, 2 V to 5 V.
5 OUT Gate Drive Output. Held low unless required inputs are present.
Output Logic with Dual-Input Configuration
IN+
0(7)
0(7)
IN−
0
1(7)
10
1 1(7)
Note:
7. Default input signal if no external connection is made.
OUT
0
0
1
0
© 2008 Fairchild Semiconductor Corporation
FAN3111 Rev. 1.6
2
www.fairchildsemi.com


Part Number FAN3111
Description Low-Side Gate Driver
Maker Fairchild Semiconductor
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