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Fairchild Semiconductor Electronic Components Datasheet

FXL5T244 Datasheet

Low Voltage Dual Supply 5-Bit Signal Translator

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June 2004
Revised June 2004
FXL5T244
Low Voltage Dual Supply 5-Bit Signal Translator
with Configurable Voltage Supplies
and Signal Levels and 3-STATE Outputs
General Description
The FXL5T244 is a configurable dual-voltage-supply trans-
lator designed for one-way (unidirectional) voltage transla-
tion of signals between two voltage levels. The device
allows translation between voltages as high as 3.6V to as
low as 1.1V. A Inputs and the OE Control Pin track the VCCI
level, and Y Outputs track the VCCO level. Both inputs and
outputs are designed to accept supply voltage levels from
1.1V to 3.6V. This allows for unidirectional voltage transla-
tion over a variety of voltage levels: 1.2V, 1.5V, 1.8V, 2.5V,
and 3.3V.
The device remains in 3-STATE until both VCCs reach
active levels allowing either VCC to be powered-up first.
The device also contains power down control circuits that
place the device in 3-STATE if either VCC is removed. The
OE input, when HIGH, disables the outputs by placing
them in 3-STATE condition.
Features
s One-way (unidirectional) translation between any
2 levels from 1.1V to 3.6V
s Fully configurable, inputs and outputs track respective
VCC levels
s Non-preferential power-up sequencing; either VCC may
be powered-up first
s Outputs remain in 3-STATE until active VCC level is
reached
s Outputs switch to 3-STATE if either VCC is at GND
s Power-off protection
s Control input (OE) level is referenced to VCCI voltage
s Packaged in 14-terminal DQFN (2.5mm x 3.0mm)
package
s ESD protection exceeds:
• 4kV HBM ESD
(per JESD22-A114 & Mil Std 883e 3015.7)
• 8kV HBM I/O to GND ESD
(per JESD22-A114 & Mil Std 883e 3015.7)
• 1kV CDM ESD (per ESD STM 5.3)
• 200V MM ESD (per JESD22-A115 & ESD STM5.2)
Ordering Code:
Order Number
FXL5T244BQX
Package
Number
MLP014A
Package Description
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241,
2.5 x 3.0mm
© 2004 Fairchild Semiconductor Corporation DS500892
www.fairchildsemi.com


Fairchild Semiconductor Electronic Components Datasheet

FXL5T244 Datasheet

Low Voltage Dual Supply 5-Bit Signal Translator

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Terminal Descriptions
Terminal
Names
OE
An
Yn
VCCI
VCCO
GND
Description
Output Enable Input
Data Inputs
3-STATE Outputs
Inputs Power Supply
Outputs Power Supply
Ground
Truth Table
Inputs
OE
L
L
H
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
An
L
H
X
Outputs
Yn
L
H
3-STATE
Connection Diagram
Terminal Assignments for DQFN
Terminal Assignment
Terminal Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Terminal Name
VCCI
A0
A1
A2
A3
A4
GND
OE
Y4
Y3
Y2
Y1
Y0
VCCO
(Top View)
Power-Up/Power-Down Sequencing
FXL translators offer an advantage in that either VCC may
be powered up first. This benefit derives from the chip
design. When either VCC is at 0 volts, outputs are in a
HIGH-Impedance state. The control input, OE, is designed
to track the VCCI supply. A pull-up resistor tying OE to VCCI
should be used to ensure that bus contention, excessive
currents, or oscillations do not occur during power-up/
power-down. The size of the pull-up resistor is based upon
the current-sinking capability of the OE driver.
The recommended power-up sequence is the following:
1. Apply power to either VCC.
2. Apply power to the OE input (Logic HIGH for A-to-B
operation; Logic LOW for B-to-A operation) and to the
respective data inputs (A Port or B Port). This may
occur at the same time as Step 1.
3. Apply power to other VCC.
4. Drive the OE input LOW to enable the device.
The recommended power-down sequence is the following:
1. Drive OE input HIGH to disable the device.
2. Remove power from either VCC.
3. Remove power from other VCC.
www.fairchildsemi.com
2


Part Number FXL5T244
Description Low Voltage Dual Supply 5-Bit Signal Translator
Maker Fairchild Semiconductor
Total Page 8 Pages
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