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MM74C76 - Dual J-K Flip-Flops

This page provides the datasheet information for the MM74C76, a member of the MM74C73 Dual J-K Flip-Flops family.

Description

The MM74C73 and MM74C76 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors.

Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs.

Features

  • s Supply voltage range: 3V to 15V s Tenth power TTL compatible: Drive 2 LPTTL loads s High noise immunity: 0.45 VCC (typ. ) s Low power: 50 nW (typ. ) s Medium speed operation: 10 MHz (typ. ).

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Full PDF Text Transcription

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MM74C73 • MM74C76 Dual J-K Flip-Flops with Clear and Preset October 1987 Revised January 1999 MM74C73 • MM74C76 Dual J-K Flip-Flops with Clear and Preset General Description The MM74C73 and MM74C76 dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement transistors. Each flip-flop has independent J, K, clock and clear inputs and Q and Q outputs. The MM74C76 flip flops also include preset inputs and are supplied in 16 pin packages. This flip-flop is edge sensitive to the clock input and change state on the negative going transition of the clock pulse. Clear or preset is independent of the clock and is accomplished by a low level on the respective input.
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