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56F826 - 16-bit Digital Signal Controllers

Description

Up to 40 MIPS at 80MHz core frequency DSP and MCU functionality in a unified, C-efficient architecture Hardware DO and REP loops MCU-friendly instruction set supports both DSP and controller functions: MAC, bit manipulation unit, 14 addressing modes 31.5K × 16

Features

  • 1.1.1.
  • Processing Core Efficient 16-bit 56800 family controller engine with dual Harvard architecture As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC) Two 36-bit accumulators, including extension bits 16-bit bidirectional barrel shifter Parallel instruction set with un.

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Full PDF Text Transcription

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56F826 Data Sheet Preliminary Technical Data www.DataSheet4U.com 56F800 16-bit Digital Signal Controllers DSP56F826 Rev. 14 01/2007 freescale.com 56F826 General Description • • • • Up to 40 MIPS at 80MHz core frequency DSP and MCU functionality in a unified, C-efficient architecture Hardware DO and REP loops MCU-friendly instruction set supports both DSP and controller functions: MAC, bit manipulation unit, 14 addressing modes 31.
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