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DSP56002 - 24-Bit Digital Signal Processor

Download the DSP56002 datasheet PDF. This datasheet also covers the DSP56L002 variant, as both devices belong to the same 24-bit digital signal processor family and are provided as variant models within a single manufacturer datasheet.

Description

of the DSP56002/L002 and are necessary to properly design with the part.

Documentation is available from a local Motorola distributor, a Motorola semiconductor sales office, or a Motorola Literature Distribution Center listed on the back page.

Features

  • illustrated in Figure 1, makes the DSP56002/L002 a cost-effective, high-performance solution for high-precision generalpurpose digital signal processing. Freescale Semiconductor, Inc 1 24-bit Timer / Event Counter 6 Sync. Serial (SSI) or I/O 3 Serial Comm. (SCI) or I/O 15 Host Interface (HI) or I/O Program Memory 512 × 24 RAM 64 × 24 ROM (boot) 16-bit Bus 24-bit Bus X Data Memory 256 × 24 RAM 256 × 24 ROM (A-law / µ-law) Y Data Memory 256 × 24 RAM 256 × 24 ROM (sine) 24-bit 56000 DSP Co.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (DSP56L002_FreescaleSemiconductor.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR PRODUCT INFORMATION Product Brief Freescale Semiconductor, Inc. Order this document by DSP56002P/D www.DataSheet4U.com DSP56002 DSP56L002 24-bit Digital Signal Processor The DSP56002 and the DSP56L002 are MPU-style general purpose Digital Signal Processors (DSPs), composed of an efficient 24-bit digital signal processor core, program and data memories, various peripherals, and support circuitry. The 56000-Family-compatible DSP core is fed by onchip program RAM, two independent data RAMs, and two data ROMs with sine and A-law and µ-law tables. The DSP56002/L002 contains a Serial Communication Interface (SCI), Synchronous Serial Interface (SSI), parallel Host Interface (HI), Timer/Event Counter, Phase-Locked Loop (PLL), and On-chip Emulation (OnCE™) port.
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