M68HC05BD5 Datasheet | Freescale Semiconductor

MC68HC05BD3D/H MC68HC05BD3 TECHNICAL DATA .. HC05 MC68HC05BD3 MC68HC705BD3 MC68HC05BD5 TECHNICAL DATA GENERAL DESCRIPTION PIN DESCRIPTION AND I/O PORTS MEMORY AND REGISTERS RESETS AND INTERRUPTS MULTI-FUNCTION TIMER PULSE WIDTH MODULATION M-BUS SERIAL INTERFACE SYNC SIGNAL PROCESSOR CPU CORE AND INSTRUCTION SET LOW POWER MODES OPERATING MODES ELECTRICAL SPECIFICATIONS MECHANICAL SPECIFICATIONS MC68HC705BD3 TPG MC68HC05BD5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 GENERAL DESCRIPTION PIN DESCRIPTION AND I/O PORTS MEMORY AND REGISTERS RESETS AND INTERRUPTS MULTI-FUNCTION TIMER PULSE WIDTH MODULATION M-BUS SERIAL INTERFACE SYNC SIGNAL PROCESSOR CPU CORE AND INSTRUCTION SET LOW POWER MODES OPERATING MODES ELECTRICAL SPECIFICATIONS MECHANICAL SPECIFICATIONS MC68HC705BD3 MC68HC05BD5 MC68HC05BD3 MC68HC705BD3 MC68HC05BD5 High-density plementary metal oxide semiconductor (HCMOS) microcontroller unit Conventions Register and bit mnemonics are defined in the paragraphs describing them. An overbar is used to designate an active-low signal, eg: RESET. Unless otherwise stated, blank cells in a register diagram indicate that the bit is either unused or reserved; shaded cells indicate that the bit is not described in the following paragraphs; ‘u’ is used to indicate an undefined state (on reset). CUSTOMER FEEDBACK QUESTIONNAIRE (MC68HC05BD3D/H) Motorola wishes to continue to improve the quality of its documentation. We would wele your feedback on the publication you have just received. Having used the document, please plete this card (or a photocopy of it, if you prefer). 1. How would you rate the quality of the document? Check one box in each category. Excellent Organization Readability Understandability Accuracy Illustrations ments: Poor Excellent Tables Table of contents Index Page size/binding Overall impression Poor t t t t t t t t t t t t t t t t t t t t t t t Not at all t t t t t t t t t...