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MC100ES6221 - Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer

Description

The MC100ES6221 is designed for low skew clock distribution systems and supports clock frequencies up to 2 GHz.

The device accepts two clock sources.

Features

  • 1:20 differential clock fanout buffer 100 ps maximum device skew SiGe technology Supports DC to 2 GHz operation of clock or data signals ECL/PECL compatible differential clock outputs ECL/PECL/HSTL compatible differential clock inputs Single 3.3 V,.
  • 3.3 V, 2.5 V or.
  • 2.5 V supply Standard 52 lead LQFP package with exposed pad for enhanced thermal characteristics Supports i.

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Datasheet Details

Part number MC100ES6221
Manufacturer Freescale Semiconductor
File Size 340.29 KB
Description Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer
Datasheet download datasheet MC100ES6221 Datasheet
Additional preview pages of the MC100ES6221 datasheet.

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Full PDF Text Transcription

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Freescale Semiconductor Technical Data MC100ES6221 Rev 5, 04/2005 www.DataSheet4U.com Low Voltage 1:20 Differential ECL/PECL/HSTL Clock Fanout Buffer The MC100ES6221 is a bipolar monolithic differential clock fanout buffer. Designed for most demanding clock distribution systems, the MC100ES6221 supports various applications that require the distribution of precisely aligned differential clock signals. Using SiGe technology and a fully differential architecture, the device offers very low skew outputs and superior digital signal characteristics. Target applications for this clock driver is high performance clock distribution in computing, networking and telecommunication systems.
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