Freescale Semiconductor Electronic Components Datasheet

MC56F8246 Datasheet

(MC56F824x / MC56F825x) Digital Signal Controller Battery chargers and management

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Freescale Semiconductor

Technical Data

Document Number: MC56F825X

Rev. 3, 04/2011

MC56F825x/MC56F824x

Digital Signal Controller

44-pin LQFP

Case:

10 x 10 mm2

64-pin LQFP

Case:

10 x 10 mm2

48-pin LQFP

Case:

7 x 7 mm2

The MC56F825x/MC56F824x is a member of the 56800E

core-based family of digital signal controllers (DSCs). It

combines, on a single chip, the processing power of a DSP

and the functionality of a microcontroller with a flexible set of

peripherals to create a cost-effective solution. Because of its

lwowwwc.oDsatta,Schoeentf4iUg.unertation flexibility, and compact program

code, it is well-suited for many applications. The

MC56F825x/MC56F824x includes many peripherals that are

especially useful for cost-sensitive applications, including:

• Industrial control

• Home appliances

• Smart sensors

• Fire and security systems

• Solar inverters

• Battery chargers and management

• Switched-mode power supplies and power management

• Power metering

• Motor control (ACIM, BLDC, PMSM, SR, and stepper)

• Handheld power tools

• Arc detection

• Medical devices/equipment

• Instrumentation

• Lighting ballast

The 56800E core is based on a modified Harvard-style

architecture consisting of three execution units operating in

parallel, allowing as many as six operations per instruction

cycle. The MCU-style programming model and optimized

instruction set allow straightforward generation of efficient,

compact DSP and control code. The instruction set is also

highly efficient for C compilers to enable rapid development

of optimized control applications.

The MC56F825x/MC56F824x supports program execution

from internal memories. Two data operands per instruction

cycle can be accessed from the on-chip data RAM. A full set

of programmable peripherals supports various applications.

Each peripheral can be independently shut down to save

power. Any pin, except Power pins and the Reset pin, can also

be configured as General Purpose Input/Outputs (GPIOs).

On-chip features include:

• 60 MHz operation frequency

• DSP and MCU functionality in a unified, C-efficient

architecture

• On-chip memory

– 56F8245/46: 48 KB (24K x 16) flash memory; 6 KB

(3K x 16) unified data/program RAM

– 56F8247: 48 KB (24K x 16) flash memory; 8 KB

(4K x 16) unified data/program RAM

– 56F8255/56/57: 64 KB (32K x 16) flash memory; 8 KB

(4K x 16) unified data/program RAM

• eFlexPWM with up to 9 channels, including 6 channels

with high (520 ps) resolution NanoEdge placement

• Two 8-channel, 12-bit analog-to-digital converters (ADCs)

with dynamic x2 and x4 programmable amplifier,

conversion time as short as 600 ns, and input

current-injection protection

• Three analog comparators with integrated 5-bit DAC

references

• Cyclic Redundancy Check (CRC) Generator

• Two high-speed queued serial communication interface

(QSCI) modules with LIN slave functionality

• Queued serial peripheral interface (QSPI) module

• Two SMBus-compatible inter-integrated circuit (I2C) ports

• Freescale’s scalable controller area network (MSCAN) 2.0

A/B module

• Two 16-bit quad timers (2 x 4 16-bit timers)

• Computer operating properly (COP) watchdog module

• On-chip relaxation oscillator: 8 MHz (400 kHz at standby

mode)

• Crystal/resonator oscillator

• Integrated power-on reset (POR) and low-voltage interrupt

(LVI) and brown-out reset module

• Inter-module crossbar connection

• Up to 54 GPIOs

• 44-pin LQFP, 48-pin LQFP, and 64-pin LQFP packages

• Single supply: 3.0 V to 3.6 V

Freescale reserves the right to change the detail specifications as may be required to permit

improvements in the design of its products.

Freescale Semiconductor Electronic Components Datasheet

MC56F8246 Datasheet

(MC56F824x / MC56F825x) Digital Signal Controller Battery chargers and management

No Preview Available !

Table of Contents

1 MC56F825x/MC56F824x Family Configuration . . . . . . . . . . . .3

2 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

2.1 MC56F825x/MC56F824x Features. . . . . . . . . . . . . . . . .4

2.2 Award-Winning Development Environment. . . . . . . . . . .8

2.3 Architecture Block Diagram. . . . . . . . . . . . . . . . . . . . . . .8

2.4 Product Documentation . . . . . . . . . . . . . . . . . . . . . . . .11

3 Signal/Connection Descriptions . . . . . . . . . . . . . . . . . . . . . . .11

3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

3.2 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

3.3 MC56F825x/MC56F824x Signal Pins . . . . . . . . . . . . . .18

4 Memory Maps. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

4.2 Program Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30

4.3 Data Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31

4.4 Interrupt Vector Table and Reset Vector . . . . . . . . . . . .33

4.5 Peripheral Memory-Mapped Registers . . . . . . . . . . . . .34

4.6 EOnCE Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . .35

5 General System Control Information . . . . . . . . . . . . . . . . . . .36

5.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

5.2 Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

5.3 Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

5.4 On-chip Clock Synthesis . . . . . . . . . . . . . . . . . . . . . . . .37

5.5 Interrupt Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . .39

5.6 System Integration Module (SIM) . . . . . . . . . . . . . . . . .39

5.7 Inter-Module Connections. . . . . . . . . . . . . . . . . . . . . . .40

5.8 Joint Test Action Group (JTAG)/Enhanced On-Chip

Emulator (EOnCE) . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

6 Security Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

6.1 Operation with Security Enabled. . . . . . . . . . . . . . . . . .46

6.2 Flash Access Lock and Unlock Mechanisms . . . . . . . .47

6.3 Product Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48

7 Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48

7.1 General Characteristics . . . . . . . . . . . . . . . . . . . . . . . .48

7.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . .49

7.3 ESD Protection and Latch-up Immunity . . . . . . . . . . . .50

7.4 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .50

7.5 Recommended Operating Conditions . . . . . . . . . . . . . .52

7.6 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . 53

7.7 Supply Current Characteristics . . . . . . . . . . . . . . . . . . 55

7.8 Power-On Reset, Low Voltage Detection Specification 56

7.9 Voltage Regulator Specifications . . . . . . . . . . . . . . . . . 56

7.10 AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . 56

7.11 Enhanced Flex PWM Characteristics . . . . . . . . . . . . . 57

7.12 Flash Memory Characteristics . . . . . . . . . . . . . . . . . . . 57

7.13 External Clock Operation Timing. . . . . . . . . . . . . . . . . 57

7.14 Phase Locked Loop Timing . . . . . . . . . . . . . . . . . . . . . 58

7.15 External Crystal or Resonator Requirement . . . . . . . . 59

7.16 Relaxation Oscillator Timing . . . . . . . . . . . . . . . . . . . . 59

7.17 Reset, Stop, Wait, Mode Select, and Interrupt Timing. 60

7.18 Queued Serial Peripheral Interface (SPI) Timing . . . . 60

7.19 Queued Serial Communication Interface (SCI) Timing 64

7.20 Freescale’s Scalable Controller Area Network (MSCAN)65

7.21 Inter-Integrated Circuit Interface (I2C) Timing . . . . . . . 65

7.22 JTAG Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

7.23 Quad Timer Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

7.24 COP Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

7.25 Analog-to-Digital Converter (ADC) Parameters. . . . . . 68

7.26 Digital-to-Analog Converter (DAC) Parameters . . . . . . 70

7.27 5-Bit Digital-to-Analog Converter (DAC) Parameters. . 71

7.28 HSCMP Specifications . . . . . . . . . . . . . . . . . . . . . . . . 71

7.29 Optimize Power Consumption . . . . . . . . . . . . . . . . . . . 71

8 Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

8.1 Thermal Design Considerations . . . . . . . . . . . . . . . . . 72

8.2 Electrical Design Considerations. . . . . . . . . . . . . . . . . 73

9 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

10 Package Mechanical Outline Drawings . . . . . . . . . . . . . . . . . 76

10.1 44-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

10.2 48-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

10.3 64-pin LQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

11 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84

Appendix A

Interrupt Vector Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85

MC56F825x/MC56F824x Digital Signal Controller, Rev. 3

2 Freescale Semiconductor

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MC56F8246 Datasheet

(MC56F824x / MC56F825x) Digital Signal Controller Battery chargers and management

MC56F8246 Datasheet

(MC56F824x / MC56F825x) Digital Signal Controller Battery chargers and management

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