To provide the most up-to-date information, the document revision on the Internet is the most current. A
printed copy may be an earlier revision. To verify you have the latest information available, refer to :
This document contains information for all constituent modules, with the exception of the S12Z CPU.
For S12ZCPU information please refer to the CPU S12Z Reference Manual.
S12ZVM32 and S12ZVM16 specific information is preliminary until these devices are qualified.
The following revision history table summarizes changes contained in this document. The individual
module sections contain revision history tables with more detailed information.
12 Dec 2013
20 JAN 2014
Table 0-1. Revision History
Replaced generic 8-channel TIM section with specific 4-channel TIM section
Textual enhancements and corrections throughout
Updated electrical parameter section and added parameters for temperataures up to 175°C
- Added Table A-5
- Merged Table A-8 and A-9 into Table A-9. Values updated. .
- Table A-15. Parameter #2. max changed from 800uA to 1050uA
- Table A-15. Inserted new C class parameter ISUPS at 85C. typ. 80uA
- Appendices B,D and E. Updated parameter values based on characterization results.
- Appendix C. Added parameter values for range above T=150°C
- Table F-3. Merged rows 2a and 2b. Merged rows 6a and 6b.
- Appendix G. Merged tables G-1 and G-2.
- Tables H-1 and H-2 values updated.
Updated Stop mode description for BDC enabled case
Removed false reference to modified clock monitor assert frequency
Updated electricals for 175°C Grade0
- Removed temperature range disclaimer from electrical parameter spec.footer
- Added sentence above table A-3
- Table D-1. LINPHY parameters 12a and 12b replaced by 12a, 12b and 12c-
- Table D-2. LINPHY wake up pulse over whole temperature range
- Table E-1. FET gate charge spec. updated
Updated family derivative table for S12ZVML32, S12ZVM32 and S12ZVM16 devices
Added 64KB, 32KB and 16KB derivative information to flash module chapter
Added pin routing options for S12ZVM32 and S12ZVM16 devices
Added HV Phy information for the S12ZVM32 and S12ZVM16 derivatives
Updated Part ID assignment table and ordering information for S12ZVM32 and S12ZVM16
Corrected PLL VCO maximum frequency specification
Changed VLVLSA maximum from 7V to 6.9V
Added electrical parameter for HD division ratio through the phase multiplexer
Corrected preferred VRL reference from VRL_1 to VRL_0
Included NVM timing parameters for the S12ZVM32 and S12ZVM16 devices
Added GDU S12ZVM32 and S12ZVM16 specific differences and electrical specifications
Added references to fWSTAT
Added VDDX short circuit fall back current and temperature/input dependency specs.
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